1 /* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */ 2 3 /* 4 * Copyright 1996 The Board of Trustees of The Leland Stanford 5 * Junior University. All Rights Reserved. 6 * 7 * Permission to use, copy, modify, and distribute this 8 * software and its documentation for any purpose and without 9 * fee is hereby granted, provided that the above copyright 10 * notice appear in all copies. Stanford University 11 * makes no representations about the suitability of this 12 * software for any purpose. It is provided "as is" without 13 * express or implied warranty. 14 * 15 * $FreeBSD$ 16 */ 17 18 /* 19 * Jump table for MIPS cpu locore functions that are implemented 20 * differently on different generations, or instruction-level 21 * archtecture (ISA) level, the Mips family. 22 * 23 * We currently provide support for MIPS I and MIPS III. 24 */ 25 26 #ifndef _MIPS_LOCORE_H 27 #define _MIPS_LOCORE_H 28 29 #include <machine/cpufunc.h> 30 #include <machine/cpuregs.h> 31 #include <machine/frame.h> 32 #include <machine/md_var.h> 33 34 /* 35 * CPU identification, from PRID register. 36 */ 37 38 #define MIPS_PRID_REV(x) (((x) >> 0) & 0x00ff) 39 #define MIPS_PRID_IMPL(x) (((x) >> 8) & 0x00ff) 40 41 /* pre-MIPS32/64 */ 42 #define MIPS_PRID_RSVD(x) (((x) >> 16) & 0xffff) 43 #define MIPS_PRID_REV_MIN(x) ((MIPS_PRID_REV(x) >> 0) & 0x0f) 44 #define MIPS_PRID_REV_MAJ(x) ((MIPS_PRID_REV(x) >> 4) & 0x0f) 45 46 /* MIPS32/64 */ 47 #define MIPS_PRID_CID(x) (((x) >> 16) & 0x00ff) /* Company ID */ 48 #define MIPS_PRID_CID_PREHISTORIC 0x00 /* Not MIPS32/64 */ 49 #define MIPS_PRID_CID_MTI 0x01 /* MIPS Technologies, Inc. */ 50 #define MIPS_PRID_CID_BROADCOM 0x02 /* Broadcom */ 51 #define MIPS_PRID_CID_ALCHEMY 0x03 /* Alchemy Semiconductor */ 52 #define MIPS_PRID_CID_SIBYTE 0x04 /* SiByte */ 53 #define MIPS_PRID_CID_SANDCRAFT 0x05 /* SandCraft */ 54 #define MIPS_PRID_CID_PHILIPS 0x06 /* Philips */ 55 #define MIPS_PRID_CID_TOSHIBA 0x07 /* Toshiba */ 56 #define MIPS_PRID_CID_LSI 0x08 /* LSI */ 57 /* 0x09 unannounced */ 58 /* 0x0a unannounced */ 59 #define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */ 60 #define MIPS_PRID_CID_RMI 0x0c /* RMI */ 61 #define MIPS_PRID_CID_CAVIUM 0x0d /* Cavium */ 62 #define MIPS_PRID_CID_INGENIC 0xe1 /* Ingenic */ 63 #define MIPS_PRID_CID_INGENIC2 0xd1 /* Ingenic */ 64 65 #define MIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company Options */ 66 67 #endif /* _MIPS_LOCORE_H */ 68