1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2006 Wojciech A. Koszek <[email protected]> All rights reserved.
5  * Copyright (c) 2009 M. Warner Losh <[email protected]>
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $Id$
29  */
30 #include "opt_uart.h"
31 
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/cons.h>
39 
40 #include <machine/bus.h>
41 
42 #include <dev/uart/uart.h>
43 #include <dev/uart/uart_cpu.h>
44 
45 #include <mips/cavium/octeon_pcmap_regs.h>
46 
47 #include <contrib/octeon-sdk/cvmx.h>
48 
49 bus_space_tag_t uart_bus_space_io;
50 bus_space_tag_t uart_bus_space_mem;
51 
52 /*
53  * Specailized uart bus space.  We present a 1 apart byte oriented
54  * bus to the outside world, but internally translate to/from the 8-apart
55  * 64-bit word bus that's on the octeon.  We only support simple read/write
56  * in this space.  Everything else is undefined.
57  */
58 static uint8_t
ou_bs_r_1(void * t,bus_space_handle_t handle,bus_size_t offset)59 ou_bs_r_1(void *t, bus_space_handle_t handle, bus_size_t offset)
60 {
61 
62 	return (cvmx_read64_uint64(handle + offset));
63 }
64 
65 static uint16_t
ou_bs_r_2(void * t,bus_space_handle_t handle,bus_size_t offset)66 ou_bs_r_2(void *t, bus_space_handle_t handle, bus_size_t offset)
67 {
68 
69 	return (cvmx_read64_uint64(handle + offset));
70 }
71 
72 static uint32_t
ou_bs_r_4(void * t,bus_space_handle_t handle,bus_size_t offset)73 ou_bs_r_4(void *t, bus_space_handle_t handle, bus_size_t offset)
74 {
75 
76 	return (cvmx_read64_uint64(handle + offset));
77 }
78 
79 static uint64_t
ou_bs_r_8(void * t,bus_space_handle_t handle,bus_size_t offset)80 ou_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset)
81 {
82 
83 	return (cvmx_read64_uint64(handle + offset));
84 }
85 
86 static void
ou_bs_w_1(void * t,bus_space_handle_t bsh,bus_size_t offset,uint8_t value)87 ou_bs_w_1(void *t, bus_space_handle_t bsh, bus_size_t offset, uint8_t value)
88 {
89 
90 	cvmx_write64_uint64(bsh + offset, value);
91 }
92 
93 static void
ou_bs_w_2(void * t,bus_space_handle_t bsh,bus_size_t offset,uint16_t value)94 ou_bs_w_2(void *t, bus_space_handle_t bsh, bus_size_t offset, uint16_t value)
95 {
96 
97 	cvmx_write64_uint64(bsh + offset, value);
98 }
99 
100 static void
ou_bs_w_4(void * t,bus_space_handle_t bsh,bus_size_t offset,uint32_t value)101 ou_bs_w_4(void *t, bus_space_handle_t bsh, bus_size_t offset, uint32_t value)
102 {
103 
104 	cvmx_write64_uint64(bsh + offset, value);
105 }
106 
107 static void
ou_bs_w_8(void * t,bus_space_handle_t bsh,bus_size_t offset,uint64_t value)108 ou_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, uint64_t value)
109 {
110 
111 	cvmx_write64_uint64(bsh + offset, value);
112 }
113 
114 struct bus_space octeon_uart_tag = {
115 	.bs_map = generic_bs_map,
116 	.bs_unmap = generic_bs_unmap,
117 	.bs_subregion = generic_bs_subregion,
118 	.bs_barrier = generic_bs_barrier,
119 	.bs_r_1 = ou_bs_r_1,
120 	.bs_r_2 = ou_bs_r_2,
121 	.bs_r_4 = ou_bs_r_4,
122 	.bs_r_8 = ou_bs_r_8,
123 	.bs_w_1 = ou_bs_w_1,
124 	.bs_w_2 = ou_bs_w_2,
125 	.bs_w_4 = ou_bs_w_4,
126 	.bs_w_8 = ou_bs_w_8,
127 };
128 
129 extern struct uart_class uart_oct16550_class;
130 
131 int
uart_cpu_eqres(struct uart_bas * b1,struct uart_bas * b2)132 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
133 {
134 
135 	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
136 }
137 
138 int
uart_cpu_getdev(int devtype,struct uart_devinfo * di)139 uart_cpu_getdev(int devtype, struct uart_devinfo *di)
140 {
141 	struct uart_class *class = &uart_oct16550_class;
142 
143 	/*
144 	 * These fields need to be setup corretly for uart_getenv to
145 	 * work in all cases.
146 	 */
147 	uart_bus_space_io = NULL;		/* No io map for this device */
148 	uart_bus_space_mem = &octeon_uart_tag;
149 	di->bas.bst = uart_bus_space_mem;
150 
151 	/*
152 	 * If env specification for UART exists it takes precedence:
153 	 * hw.uart.console="mm:0xf1012000" or similar
154 	 */
155 	if (uart_getenv(devtype, di, class) == 0)
156 		return (0);
157 
158 	/*
159 	 * Fallback to UART0 for console.
160 	 */
161 	di->ops = uart_getops(class);
162 	di->bas.chan = 0;
163 	/* XXX */
164 	if (bus_space_map(di->bas.bst, CVMX_MIO_UARTX_RBR(0),
165 	    uart_getrange(class), 0, &di->bas.bsh) != 0)
166 		return (ENXIO);
167 	di->bas.regshft = 3;
168 	di->bas.rclk = 0;
169 	di->baudrate = 115200;
170 	di->databits = 8;
171 	di->stopbits = 1;
172 	di->parity = UART_PARITY_NONE;
173 
174 	return (0);
175 }
176