1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2012 ST-Ericsson AB 4 */ 5 6#include <dt-bindings/interrupt-controller/irq.h> 7#include "ste-href-family-pinctrl.dtsi" 8 9/ { 10 memory { 11 device_type = "memory"; 12 reg = <0x00000000 0x20000000>; 13 }; 14 15 soc { 16 uart@80120000 { 17 pinctrl-names = "default", "sleep"; 18 pinctrl-0 = <&u0_a_1_default>; 19 pinctrl-1 = <&u0_a_1_sleep>; 20 status = "okay"; 21 }; 22 23 /* This UART is unused and thus left disabled */ 24 uart@80121000 { 25 pinctrl-names = "default", "sleep"; 26 pinctrl-0 = <&u1rxtx_a_1_default>; 27 pinctrl-1 = <&u1rxtx_a_1_sleep>; 28 }; 29 30 uart@80007000 { 31 pinctrl-names = "default", "sleep"; 32 pinctrl-0 = <&u2rxtx_c_1_default>; 33 pinctrl-1 = <&u2rxtx_c_1_sleep>; 34 status = "okay"; 35 }; 36 37 i2c@80004000 { 38 pinctrl-names = "default","sleep"; 39 pinctrl-0 = <&i2c0_a_1_default>; 40 pinctrl-1 = <&i2c0_a_1_sleep>; 41 status = "okay"; 42 }; 43 44 i2c@80122000 { 45 pinctrl-names = "default","sleep"; 46 pinctrl-0 = <&i2c1_b_2_default>; 47 pinctrl-1 = <&i2c1_b_2_sleep>; 48 status = "okay"; 49 }; 50 51 i2c@80128000 { 52 pinctrl-names = "default","sleep"; 53 pinctrl-0 = <&i2c2_b_2_default>; 54 pinctrl-1 = <&i2c2_b_2_sleep>; 55 status = "okay"; 56 lp5521@33 { 57 compatible = "national,lp5521"; 58 reg = <0x33>; 59 label = "lp5521_pri"; 60 clock-mode = /bits/ 8 <2>; 61 chan0 { 62 led-cur = /bits/ 8 <0x2f>; 63 max-cur = /bits/ 8 <0x5f>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 chan1 { 67 led-cur = /bits/ 8 <0x2f>; 68 max-cur = /bits/ 8 <0x5f>; 69 }; 70 chan2 { 71 led-cur = /bits/ 8 <0x2f>; 72 max-cur = /bits/ 8 <0x5f>; 73 }; 74 }; 75 lp5521@34 { 76 compatible = "national,lp5521"; 77 reg = <0x34>; 78 label = "lp5521_sec"; 79 clock-mode = /bits/ 8 <2>; 80 chan0 { 81 led-cur = /bits/ 8 <0x2f>; 82 max-cur = /bits/ 8 <0x5f>; 83 }; 84 chan1 { 85 led-cur = /bits/ 8 <0x2f>; 86 max-cur = /bits/ 8 <0x5f>; 87 }; 88 chan2 { 89 led-cur = /bits/ 8 <0x2f>; 90 max-cur = /bits/ 8 <0x5f>; 91 }; 92 }; 93 bh1780@29 { 94 compatible = "rohm,bh1780gli"; 95 reg = <0x29>; 96 }; 97 }; 98 99 i2c@80110000 { 100 pinctrl-names = "default","sleep"; 101 pinctrl-0 = <&i2c3_c_2_default>; 102 pinctrl-1 = <&i2c3_c_2_sleep>; 103 status = "okay"; 104 }; 105 106 /* ST6G3244ME level translator for 1.8/2.9 V */ 107 vmmci: regulator-gpio { 108 compatible = "regulator-gpio"; 109 110 regulator-min-microvolt = <1800000>; 111 regulator-max-microvolt = <2900000>; 112 regulator-name = "mmci-reg"; 113 regulator-type = "voltage"; 114 115 startup-delay-us = <100>; 116 117 states = <1800000 0x1 118 2900000 0x0>; 119 }; 120 121 // External Micro SD slot 122 sdi0_per1@80126000 { 123 arm,primecell-periphid = <0x10480180>; 124 max-frequency = <100000000>; 125 bus-width = <4>; 126 cap-sd-highspeed; 127 cap-mmc-highspeed; 128 sd-uhs-sdr12; 129 sd-uhs-sdr25; 130 full-pwr-cycle; 131 st,sig-dir-dat0; 132 st,sig-dir-dat2; 133 st,sig-dir-cmd; 134 st,sig-pin-fbclk; 135 vmmc-supply = <&ab8500_ldo_aux3_reg>; 136 vqmmc-supply = <&vmmci>; 137 pinctrl-names = "default", "sleep"; 138 pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>; 139 pinctrl-1 = <&mc0_a_1_sleep>; 140 141 status = "okay"; 142 }; 143 144 // WLAN SDIO channel 145 sdi1_per2@80118000 { 146 arm,primecell-periphid = <0x10480180>; 147 max-frequency = <100000000>; 148 bus-width = <4>; 149 non-removable; 150 pinctrl-names = "default", "sleep"; 151 pinctrl-0 = <&mc1_a_1_default>; 152 pinctrl-1 = <&mc1_a_1_sleep>; 153 154 status = "okay"; 155 }; 156 157 // PoP:ed eMMC 158 sdi2_per3@80005000 { 159 arm,primecell-periphid = <0x10480180>; 160 max-frequency = <100000000>; 161 bus-width = <8>; 162 cap-mmc-highspeed; 163 non-removable; 164 vmmc-supply = <&db8500_vsmps2_reg>; 165 pinctrl-names = "default", "sleep"; 166 pinctrl-0 = <&mc2_a_1_default>; 167 pinctrl-1 = <&mc2_a_1_sleep>; 168 169 status = "okay"; 170 }; 171 172 // On-board eMMC 173 sdi4_per2@80114000 { 174 arm,primecell-periphid = <0x10480180>; 175 max-frequency = <100000000>; 176 bus-width = <8>; 177 cap-mmc-highspeed; 178 non-removable; 179 vmmc-supply = <&ab8500_ldo_aux2_reg>; 180 pinctrl-names = "default", "sleep"; 181 pinctrl-0 = <&mc4_a_1_default>; 182 pinctrl-1 = <&mc4_a_1_sleep>; 183 184 status = "okay"; 185 }; 186 187 msp0: msp@80123000 { 188 pinctrl-names = "default"; 189 pinctrl-0 = <&msp0txrxtfstck_a_1_default>; 190 status = "okay"; 191 }; 192 193 msp1: msp@80124000 { 194 pinctrl-names = "default"; 195 pinctrl-0 = <&msp1txrx_a_1_default>; 196 status = "okay"; 197 }; 198 199 msp2: msp@80117000 { 200 pinctrl-names = "default"; 201 pinctrl-0 = <&msp2_a_1_default>; 202 }; 203 204 msp3: msp@80125000 { 205 status = "okay"; 206 }; 207 208 prcmu@80157000 { 209 ab8500 { 210 ab8500-gpio { 211 }; 212 213 ab8500_usb { 214 pinctrl-names = "default", "sleep"; 215 pinctrl-0 = <&usb_a_1_default>; 216 pinctrl-1 = <&usb_a_1_sleep>; 217 }; 218 219 ab8500-regulators { 220 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 221 regulator-name = "V-DISPLAY"; 222 }; 223 224 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { 225 regulator-name = "V-eMMC1"; 226 }; 227 228 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { 229 regulator-name = "V-MMC-SD"; 230 }; 231 232 ab8500_ldo_intcore_reg: ab8500_ldo_intcore { 233 regulator-name = "V-INTCORE"; 234 }; 235 236 ab8500_ldo_tvout_reg: ab8500_ldo_tvout { 237 regulator-name = "V-TVOUT"; 238 }; 239 240 ab8500_ldo_audio_reg: ab8500_ldo_audio { 241 regulator-name = "V-AUD"; 242 }; 243 244 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { 245 regulator-name = "V-AMIC1"; 246 }; 247 248 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { 249 regulator-name = "V-AMIC2"; 250 }; 251 252 ab8500_ldo_dmic_reg: ab8500_ldo_dmic { 253 regulator-name = "V-DMIC"; 254 }; 255 256 ab8500_ldo_ana_reg: ab8500_ldo_ana { 257 regulator-name = "V-CSI/DSI"; 258 }; 259 }; 260 }; 261 }; 262 263 pinctrl { 264 sdi0 { 265 sdi0_default_mode: sdi0_default { 266 /* Some boards set additional settings here */ 267 }; 268 }; 269 }; 270 271 mcde@a0350000 { 272 pinctrl-names = "default", "sleep"; 273 pinctrl-0 = <&lcd_default_mode>; 274 pinctrl-1 = <&lcd_sleep_mode>; 275 }; 276 }; 277}; 278