xref: /f-stack/dpdk/config/x86/meson.build (revision 2d9fd380)
1# SPDX-License-Identifier: BSD-3-Clause
2# Copyright(c) 2017-2020 Intel Corporation
3
4# get binutils version for the workaround of Bug 97
5if not is_windows
6	binutils_ok = run_command(binutils_avx512_check)
7	if binutils_ok.returncode() != 0 and cc.has_argument('-mno-avx512f')
8		machine_args += '-mno-avx512f'
9		warning('Binutils error with AVX512 assembly, disabling AVX512 support')
10	endif
11endif
12
13# we require SSE4.2 for DPDK
14if cc.get_define('__SSE4_2__', args: machine_args) == ''
15	message('SSE 4.2 not enabled by default, explicitly enabling')
16	machine_args += '-msse4'
17endif
18
19base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2']
20foreach f:base_flags
21	compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
22endforeach
23
24optional_flags = [
25	'AES',
26	'AVX',
27	'AVX2',
28	'AVX512BW',
29	'AVX512CD',
30	'AVX512DQ',
31	'AVX512F',
32	'AVX512VL',
33	'PCLMUL',
34	'RDRND',
35	'RDSEED',
36	'VPCLMULQDQ',
37]
38foreach f:optional_flags
39	if cc.get_define('__@0@__'.format(f), args: machine_args) == '1'
40		if f == 'PCLMUL' # special case flags with different defines
41			f = 'PCLMULQDQ'
42		elif f == 'RDRND'
43			f = 'RDRAND'
44		endif
45		compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
46	endif
47endforeach
48
49
50dpdk_conf.set('RTE_ARCH_X86', 1)
51if dpdk_conf.get('RTE_ARCH_64')
52	dpdk_conf.set('RTE_ARCH_X86_64', 1)
53	dpdk_conf.set('RTE_ARCH', 'x86_64')
54else
55	dpdk_conf.set('RTE_ARCH_I686', 1)
56	dpdk_conf.set('RTE_ARCH', 'i686')
57endif
58
59dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
60