1# SPDX-License-Identifier: BSD-3-Clause 2# Copyright(c) 2017 Intel Corporation. 3# Copyright(c) 2017 Cavium, Inc 4 5# for checking defines we need to use the correct compiler flags 6march_opt = '-march=@0@'.format(machine) 7 8arm_force_native_march = false 9arm_force_default_march = (machine == 'default') 10 11machine_args_generic = [ 12 ['default', ['-march=armv8-a+crc+crypto']], 13 ['native', ['-march=native']], 14 ['0xd03', ['-mcpu=cortex-a53']], 15 ['0xd04', ['-mcpu=cortex-a35']], 16 ['0xd07', ['-mcpu=cortex-a57']], 17 ['0xd08', ['-mcpu=cortex-a72']], 18 ['0xd09', ['-mcpu=cortex-a73']], 19 ['0xd0a', ['-mcpu=cortex-a75']], 20] 21machine_args_cavium = [ 22 ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], 23 ['native', ['-march=native']], 24 ['0xa1', ['-mcpu=thunderxt88']], 25 ['0xa2', ['-mcpu=thunderxt81']], 26 ['0xa3', ['-mcpu=thunderxt83']]] 27 28flags_common_default = [ 29 # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) 30 # to determine the best threshold in code. Refer to notes in source file 31 # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info. 32 ['RTE_ARCH_ARM64_MEMCPY', false], 33 # ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048], 34 # ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512], 35 # Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're 36 # strong reasons. 37 # ['RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK', false], 38 # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], 39 # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], 40 41 ['RTE_LIBRTE_FM10K_PMD', false], 42 ['RTE_LIBRTE_SFC_EFX_PMD', false], 43 ['RTE_LIBRTE_AVP_PMD', false], 44 45 ['RTE_SCHED_VECTOR', false], 46] 47 48flags_generic = [ 49 ['RTE_MACHINE', '"armv8a"'], 50 ['RTE_MAX_LCORE', 256], 51 ['RTE_USE_C11_MEM_MODEL', true], 52 ['RTE_CACHE_LINE_SIZE', 128]] 53flags_cavium = [ 54 ['RTE_MACHINE', '"thunderx"'], 55 ['RTE_CACHE_LINE_SIZE', 128], 56 ['RTE_MAX_NUMA_NODES', 2], 57 ['RTE_MAX_LCORE', 96], 58 ['RTE_MAX_VFIO_GROUPS', 128], 59 ['RTE_USE_C11_MEM_MODEL', false]] 60flags_dpaa = [ 61 ['RTE_MACHINE', '"dpaa"'], 62 ['RTE_USE_C11_MEM_MODEL', true], 63 ['RTE_CACHE_LINE_SIZE', 64], 64 ['RTE_MAX_NUMA_NODES', 1], 65 ['RTE_MAX_LCORE', 16]] 66flags_dpaa2 = [ 67 ['RTE_MACHINE', '"dpaa2"'], 68 ['RTE_USE_C11_MEM_MODEL', true], 69 ['RTE_CACHE_LINE_SIZE', 64], 70 ['RTE_MAX_NUMA_NODES', 1], 71 ['RTE_MAX_LCORE', 16], 72 ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] 73 74## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) 75impl_generic = ['Generic armv8', flags_generic, machine_args_generic] 76impl_0x41 = ['Arm', flags_generic, machine_args_generic] 77impl_0x42 = ['Broadcom', flags_generic, machine_args_generic] 78impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium] 79impl_0x44 = ['DEC', flags_generic, machine_args_generic] 80impl_0x49 = ['Infineon', flags_generic, machine_args_generic] 81impl_0x4d = ['Motorola', flags_generic, machine_args_generic] 82impl_0x4e = ['NVIDIA', flags_generic, machine_args_generic] 83impl_0x50 = ['AppliedMicro', flags_generic, machine_args_generic] 84impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] 85impl_0x53 = ['Samsung', flags_generic, machine_args_generic] 86impl_0x56 = ['Marvell', flags_generic, machine_args_generic] 87impl_0x69 = ['Intel', flags_generic, machine_args_generic] 88impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] 89impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic] 90 91dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) 92 93if cc.sizeof('void *') != 8 94 dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) 95 dpdk_conf.set('RTE_ARCH_ARM', 1) 96 dpdk_conf.set('RTE_ARCH_ARMv7', 1) 97 # the minimum architecture supported, armv7-a, needs the following, 98 # mk/machine/armv7a/rte.vars.mk sets it too 99 machine_args += '-mfpu=neon' 100else 101 dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) 102 dpdk_conf.set('RTE_ARCH_ARM64', 1) 103 dpdk_conf.set('RTE_ARCH_64', 1) 104 105 machine = [] 106 cmd_generic = ['generic', '', '', 'default', ''] 107 cmd_output = cmd_generic # Set generic by default 108 machine_args = [] # Clear previous machine args 109 if arm_force_default_march and not meson.is_cross_build() 110 machine = impl_generic 111 impl_pn = 'default' 112 elif not meson.is_cross_build() 113 # The script returns ['Implementer', 'Variant', 'Architecture', 114 # 'Primary Part number', 'Revision'] 115 detect_vendor = find_program(join_paths( 116 meson.current_source_dir(), 'armv8_machine.py')) 117 cmd = run_command(detect_vendor.path()) 118 if cmd.returncode() == 0 119 cmd_output = cmd.stdout().to_lower().strip().split(' ') 120 endif 121 # Set to generic if variable is not found 122 machine = get_variable('impl_' + cmd_output[0], ['generic']) 123 if machine[0] == 'generic' 124 machine = impl_generic 125 cmd_output = cmd_generic 126 endif 127 impl_pn = cmd_output[3] 128 if arm_force_native_march == true 129 impl_pn = 'native' 130 endif 131 else 132 impl_id = meson.get_cross_property('implementor_id', 'generic') 133 impl_pn = meson.get_cross_property('implementor_pn', 'default') 134 machine = get_variable('impl_' + impl_id) 135 endif 136 137 # Apply Common Defaults. These settings may be overwritten by machine 138 # settings later. 139 foreach flag: flags_common_default 140 if flag.length() > 0 141 dpdk_conf.set(flag[0], flag[1]) 142 endif 143 endforeach 144 145 message('Implementer : ' + machine[0]) 146 foreach flag: machine[1] 147 if flag.length() > 0 148 dpdk_conf.set(flag[0], flag[1]) 149 endif 150 endforeach 151 # Primary part number based mcpu flags are supported 152 # for gcc versions > 7 153 if cc.version().version_compare( 154 '<7.0') or cmd_output.length() == 0 155 if not meson.is_cross_build() and arm_force_native_march == true 156 impl_pn = 'native' 157 else 158 impl_pn = 'default' 159 endif 160 endif 161 foreach marg: machine[2] 162 if marg[0] == impl_pn 163 foreach f: marg[1] 164 machine_args += f 165 endforeach 166 endif 167 endforeach 168endif 169message(machine_args) 170 171if (cc.get_define('__ARM_NEON', args: machine_args) != '' or 172 cc.get_define('__aarch64__', args: machine_args) != '') 173 dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1) 174 compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] 175endif 176 177if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != '' 178 dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1) 179 compile_time_cpuflags += ['RTE_CPUFLAG_CRC32'] 180endif 181 182if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != '' 183 dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1) 184 dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1) 185 dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1) 186 dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1) 187 compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL', 188 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] 189endif 190