1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2015-2020 Beijing WangXun Technology Co., Ltd. 3 * Copyright(c) 2010-2017 Intel Corporation 4 */ 5 6 #include <sys/queue.h> 7 #include <stdio.h> 8 #include <errno.h> 9 #include <stdint.h> 10 #include <string.h> 11 #include <rte_log.h> 12 #include <ethdev_pci.h> 13 #include <rte_alarm.h> 14 15 #include "txgbe_logs.h" 16 #include "base/txgbe.h" 17 #include "txgbe_ethdev.h" 18 #include "txgbe_rxtx.h" 19 #include "txgbe_regs_group.h" 20 21 static const struct reg_info txgbevf_regs_general[] = { 22 {TXGBE_VFRST, 1, 1, "TXGBE_VFRST"}, 23 {TXGBE_VFSTATUS, 1, 1, "TXGBE_VFSTATUS"}, 24 {TXGBE_VFMBCTL, 1, 1, "TXGBE_VFMAILBOX"}, 25 {TXGBE_VFMBX, 16, 4, "TXGBE_VFMBX"}, 26 {TXGBE_VFPBWRAP, 1, 1, "TXGBE_VFPBWRAP"}, 27 {0, 0, 0, ""} 28 }; 29 30 static const struct reg_info txgbevf_regs_interrupt[] = { 31 {0, 0, 0, ""} 32 }; 33 34 static const struct reg_info txgbevf_regs_rxdma[] = { 35 {0, 0, 0, ""} 36 }; 37 38 static const struct reg_info txgbevf_regs_tx[] = { 39 {0, 0, 0, ""} 40 }; 41 42 /* VF registers */ 43 static const struct reg_info *txgbevf_regs[] = { 44 txgbevf_regs_general, 45 txgbevf_regs_interrupt, 46 txgbevf_regs_rxdma, 47 txgbevf_regs_tx, 48 NULL}; 49 50 static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev, 51 struct rte_eth_xstat *xstats, unsigned int n); 52 static int txgbevf_dev_info_get(struct rte_eth_dev *dev, 53 struct rte_eth_dev_info *dev_info); 54 static int txgbevf_dev_configure(struct rte_eth_dev *dev); 55 static int txgbevf_dev_start(struct rte_eth_dev *dev); 56 static int txgbevf_dev_link_update(struct rte_eth_dev *dev, 57 int wait_to_complete); 58 static int txgbevf_dev_stop(struct rte_eth_dev *dev); 59 static int txgbevf_dev_close(struct rte_eth_dev *dev); 60 static void txgbevf_intr_disable(struct rte_eth_dev *dev); 61 static void txgbevf_intr_enable(struct rte_eth_dev *dev); 62 static int txgbevf_dev_stats_reset(struct rte_eth_dev *dev); 63 static int txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask); 64 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on); 65 static void txgbevf_configure_msix(struct rte_eth_dev *dev); 66 static int txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev); 67 static int txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev); 68 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index); 69 static void txgbevf_dev_interrupt_handler(void *param); 70 71 /* 72 * The set of PCI devices this driver supports (for VF) 73 */ 74 static const struct rte_pci_id pci_id_txgbevf_map[] = { 75 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_SP1000_VF) }, 76 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_WX1820_VF) }, 77 { .vendor_id = 0, /* sentinel */ }, 78 }; 79 80 static const struct rte_eth_desc_lim rx_desc_lim = { 81 .nb_max = TXGBE_RING_DESC_MAX, 82 .nb_min = TXGBE_RING_DESC_MIN, 83 .nb_align = TXGBE_RXD_ALIGN, 84 }; 85 86 static const struct rte_eth_desc_lim tx_desc_lim = { 87 .nb_max = TXGBE_RING_DESC_MAX, 88 .nb_min = TXGBE_RING_DESC_MIN, 89 .nb_align = TXGBE_TXD_ALIGN, 90 .nb_seg_max = TXGBE_TX_MAX_SEG, 91 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG, 92 }; 93 94 static const struct eth_dev_ops txgbevf_eth_dev_ops; 95 96 static const struct rte_txgbe_xstats_name_off rte_txgbevf_stats_strings[] = { 97 {"rx_multicast_packets_0", 98 offsetof(struct txgbevf_hw_stats, qp[0].vfmprc)}, 99 {"rx_multicast_packets_1", 100 offsetof(struct txgbevf_hw_stats, qp[1].vfmprc)}, 101 {"rx_multicast_packets_2", 102 offsetof(struct txgbevf_hw_stats, qp[2].vfmprc)}, 103 {"rx_multicast_packets_3", 104 offsetof(struct txgbevf_hw_stats, qp[3].vfmprc)}, 105 {"rx_multicast_packets_4", 106 offsetof(struct txgbevf_hw_stats, qp[4].vfmprc)}, 107 {"rx_multicast_packets_5", 108 offsetof(struct txgbevf_hw_stats, qp[5].vfmprc)}, 109 {"rx_multicast_packets_6", 110 offsetof(struct txgbevf_hw_stats, qp[6].vfmprc)}, 111 {"rx_multicast_packets_7", 112 offsetof(struct txgbevf_hw_stats, qp[7].vfmprc)} 113 }; 114 115 #define TXGBEVF_NB_XSTATS (sizeof(rte_txgbevf_stats_strings) / \ 116 sizeof(rte_txgbevf_stats_strings[0])) 117 118 /* 119 * Negotiate mailbox API version with the PF. 120 * After reset API version is always set to the basic one (txgbe_mbox_api_10). 121 * Then we try to negotiate starting with the most recent one. 122 * If all negotiation attempts fail, then we will proceed with 123 * the default one (txgbe_mbox_api_10). 124 */ 125 static void 126 txgbevf_negotiate_api(struct txgbe_hw *hw) 127 { 128 int32_t i; 129 130 /* start with highest supported, proceed down */ 131 static const int sup_ver[] = { 132 txgbe_mbox_api_13, 133 txgbe_mbox_api_12, 134 txgbe_mbox_api_11, 135 txgbe_mbox_api_10, 136 }; 137 138 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) { 139 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0) 140 break; 141 } 142 } 143 144 static void 145 generate_random_mac_addr(struct rte_ether_addr *mac_addr) 146 { 147 uint64_t random; 148 149 /* Set Organizationally Unique Identifier (OUI) prefix. */ 150 mac_addr->addr_bytes[0] = 0x00; 151 mac_addr->addr_bytes[1] = 0x09; 152 mac_addr->addr_bytes[2] = 0xC0; 153 /* Force indication of locally assigned MAC address. */ 154 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR; 155 /* Generate the last 3 bytes of the MAC address with a random number. */ 156 random = rte_rand(); 157 memcpy(&mac_addr->addr_bytes[3], &random, 3); 158 } 159 160 /* 161 * Virtual Function device init 162 */ 163 static int 164 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev) 165 { 166 int err; 167 uint32_t tc, tcs; 168 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 169 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 170 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev); 171 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev); 172 struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev); 173 struct rte_ether_addr *perm_addr = 174 (struct rte_ether_addr *)hw->mac.perm_addr; 175 176 PMD_INIT_FUNC_TRACE(); 177 178 eth_dev->dev_ops = &txgbevf_eth_dev_ops; 179 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status; 180 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status; 181 eth_dev->rx_pkt_burst = &txgbe_recv_pkts; 182 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts; 183 184 /* for secondary processes, we don't initialise any further as primary 185 * has already done this work. Only check we don't need a different 186 * RX function 187 */ 188 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 189 struct txgbe_tx_queue *txq; 190 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues; 191 /* TX queue function in primary, set by last queue initialized 192 * Tx queue may not initialized by primary process 193 */ 194 if (eth_dev->data->tx_queues) { 195 txq = eth_dev->data->tx_queues[nb_tx_queues - 1]; 196 txgbe_set_tx_function(eth_dev, txq); 197 } else { 198 /* Use default TX function if we get here */ 199 PMD_INIT_LOG(NOTICE, 200 "No TX queues configured yet. Using default TX function."); 201 } 202 203 txgbe_set_rx_function(eth_dev); 204 205 return 0; 206 } 207 208 rte_eth_copy_pci_info(eth_dev, pci_dev); 209 210 hw->device_id = pci_dev->id.device_id; 211 hw->vendor_id = pci_dev->id.vendor_id; 212 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 213 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 214 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 215 216 /* initialize the vfta */ 217 memset(shadow_vfta, 0, sizeof(*shadow_vfta)); 218 219 /* initialize the hw strip bitmap*/ 220 memset(hwstrip, 0, sizeof(*hwstrip)); 221 222 /* Initialize the shared code (base driver) */ 223 err = txgbe_init_shared_code(hw); 224 if (err != 0) { 225 PMD_INIT_LOG(ERR, 226 "Shared code init failed for txgbevf: %d", err); 227 return -EIO; 228 } 229 230 /* init_mailbox_params */ 231 hw->mbx.init_params(hw); 232 233 /* Reset the hw statistics */ 234 txgbevf_dev_stats_reset(eth_dev); 235 236 /* Disable the interrupts for VF */ 237 txgbevf_intr_disable(eth_dev); 238 239 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */ 240 err = hw->mac.reset_hw(hw); 241 242 /* 243 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when 244 * the underlying PF driver has not assigned a MAC address to the VF. 245 * In this case, assign a random MAC address. 246 */ 247 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) { 248 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err); 249 /* 250 * This error code will be propagated to the app by 251 * rte_eth_dev_reset, so use a public error code rather than 252 * the internal-only TXGBE_ERR_RESET_FAILED 253 */ 254 return -EAGAIN; 255 } 256 257 /* negotiate mailbox API version to use with the PF. */ 258 txgbevf_negotiate_api(hw); 259 260 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */ 261 txgbevf_get_queues(hw, &tcs, &tc); 262 263 /* Allocate memory for storing MAC addresses */ 264 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN * 265 hw->mac.num_rar_entries, 0); 266 if (eth_dev->data->mac_addrs == NULL) { 267 PMD_INIT_LOG(ERR, 268 "Failed to allocate %u bytes needed to store " 269 "MAC addresses", 270 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries); 271 return -ENOMEM; 272 } 273 274 /* Generate a random MAC address, if none was assigned by PF. */ 275 if (rte_is_zero_ether_addr(perm_addr)) { 276 generate_random_mac_addr(perm_addr); 277 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1); 278 if (err) { 279 rte_free(eth_dev->data->mac_addrs); 280 eth_dev->data->mac_addrs = NULL; 281 return err; 282 } 283 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF"); 284 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address " 285 "%02x:%02x:%02x:%02x:%02x:%02x", 286 perm_addr->addr_bytes[0], 287 perm_addr->addr_bytes[1], 288 perm_addr->addr_bytes[2], 289 perm_addr->addr_bytes[3], 290 perm_addr->addr_bytes[4], 291 perm_addr->addr_bytes[5]); 292 } 293 294 /* Copy the permanent MAC address */ 295 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]); 296 297 /* reset the hardware with the new settings */ 298 err = hw->mac.start_hw(hw); 299 if (err) { 300 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err); 301 return -EIO; 302 } 303 304 /* enter promiscuous mode */ 305 txgbevf_dev_promiscuous_enable(eth_dev); 306 307 rte_intr_callback_register(intr_handle, 308 txgbevf_dev_interrupt_handler, eth_dev); 309 rte_intr_enable(intr_handle); 310 txgbevf_intr_enable(eth_dev); 311 312 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s", 313 eth_dev->data->port_id, pci_dev->id.vendor_id, 314 pci_dev->id.device_id, "txgbe_mac_raptor_vf"); 315 316 return 0; 317 } 318 319 /* Virtual Function device uninit */ 320 static int 321 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev) 322 { 323 PMD_INIT_FUNC_TRACE(); 324 325 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 326 return 0; 327 328 txgbevf_dev_close(eth_dev); 329 330 return 0; 331 } 332 333 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 334 struct rte_pci_device *pci_dev) 335 { 336 return rte_eth_dev_pci_generic_probe(pci_dev, 337 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init); 338 } 339 340 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev) 341 { 342 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit); 343 } 344 345 /* 346 * virtual function driver struct 347 */ 348 static struct rte_pci_driver rte_txgbevf_pmd = { 349 .id_table = pci_id_txgbevf_map, 350 .drv_flags = RTE_PCI_DRV_NEED_MAPPING, 351 .probe = eth_txgbevf_pci_probe, 352 .remove = eth_txgbevf_pci_remove, 353 }; 354 355 static int txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 356 struct rte_eth_xstat_name *xstats_names, unsigned int limit) 357 { 358 unsigned int i; 359 360 if (limit < TXGBEVF_NB_XSTATS && xstats_names != NULL) 361 return -ENOMEM; 362 363 if (xstats_names != NULL) 364 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) 365 snprintf(xstats_names[i].name, 366 sizeof(xstats_names[i].name), 367 "%s", rte_txgbevf_stats_strings[i].name); 368 return TXGBEVF_NB_XSTATS; 369 } 370 371 static void 372 txgbevf_update_stats(struct rte_eth_dev *dev) 373 { 374 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 375 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 376 TXGBE_DEV_STATS(dev); 377 unsigned int i; 378 379 for (i = 0; i < dev->data->nb_rx_queues; i++) { 380 /* Good Rx packet, include VF loopback */ 381 TXGBE_UPDCNT32(TXGBE_QPRXPKT(i), 382 hw_stats->qp[i].last_vfgprc, hw_stats->qp[i].vfgprc); 383 384 /* Good Rx octets, include VF loopback */ 385 TXGBE_UPDCNT36(TXGBE_QPRXOCTL(i), 386 hw_stats->qp[i].last_vfgorc, hw_stats->qp[i].vfgorc); 387 388 /* Rx Multicst Packet */ 389 TXGBE_UPDCNT32(TXGBE_QPRXMPKT(i), 390 hw_stats->qp[i].last_vfmprc, hw_stats->qp[i].vfmprc); 391 } 392 hw->rx_loaded = 0; 393 394 for (i = 0; i < dev->data->nb_tx_queues; i++) { 395 /* Good Tx packet, include VF loopback */ 396 TXGBE_UPDCNT32(TXGBE_QPTXPKT(i), 397 hw_stats->qp[i].last_vfgptc, hw_stats->qp[i].vfgptc); 398 399 /* Good Tx octets, include VF loopback */ 400 TXGBE_UPDCNT36(TXGBE_QPTXOCTL(i), 401 hw_stats->qp[i].last_vfgotc, hw_stats->qp[i].vfgotc); 402 } 403 hw->offset_loaded = 0; 404 } 405 406 static int 407 txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 408 unsigned int n) 409 { 410 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 411 TXGBE_DEV_STATS(dev); 412 unsigned int i; 413 414 if (n < TXGBEVF_NB_XSTATS) 415 return TXGBEVF_NB_XSTATS; 416 417 txgbevf_update_stats(dev); 418 419 if (!xstats) 420 return 0; 421 422 /* Extended stats */ 423 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) { 424 xstats[i].id = i; 425 xstats[i].value = *(uint64_t *)(((char *)hw_stats) + 426 rte_txgbevf_stats_strings[i].offset); 427 } 428 429 return TXGBEVF_NB_XSTATS; 430 } 431 432 static int 433 txgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 434 { 435 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 436 TXGBE_DEV_STATS(dev); 437 uint32_t i; 438 439 txgbevf_update_stats(dev); 440 441 if (stats == NULL) 442 return -EINVAL; 443 444 stats->ipackets = 0; 445 stats->ibytes = 0; 446 stats->opackets = 0; 447 stats->obytes = 0; 448 449 for (i = 0; i < 8; i++) { 450 stats->ipackets += hw_stats->qp[i].vfgprc; 451 stats->ibytes += hw_stats->qp[i].vfgorc; 452 stats->opackets += hw_stats->qp[i].vfgptc; 453 stats->obytes += hw_stats->qp[i].vfgotc; 454 } 455 456 return 0; 457 } 458 459 static int 460 txgbevf_dev_stats_reset(struct rte_eth_dev *dev) 461 { 462 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 463 TXGBE_DEV_STATS(dev); 464 uint32_t i; 465 466 /* Sync HW register to the last stats */ 467 txgbevf_dev_stats_get(dev, NULL); 468 469 /* reset HW current stats*/ 470 for (i = 0; i < 8; i++) { 471 hw_stats->qp[i].vfgprc = 0; 472 hw_stats->qp[i].vfgorc = 0; 473 hw_stats->qp[i].vfgptc = 0; 474 hw_stats->qp[i].vfgotc = 0; 475 } 476 477 return 0; 478 } 479 480 static int 481 txgbevf_dev_info_get(struct rte_eth_dev *dev, 482 struct rte_eth_dev_info *dev_info) 483 { 484 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 485 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 486 487 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; 488 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; 489 dev_info->min_rx_bufsize = 1024; 490 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX; 491 dev_info->max_mac_addrs = hw->mac.num_rar_entries; 492 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC; 493 dev_info->max_vfs = pci_dev->max_vfs; 494 dev_info->max_vmdq_pools = ETH_64_POOLS; 495 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev); 496 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) | 497 dev_info->rx_queue_offload_capa); 498 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev); 499 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev); 500 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t); 501 dev_info->reta_size = ETH_RSS_RETA_SIZE_128; 502 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL; 503 504 dev_info->default_rxconf = (struct rte_eth_rxconf) { 505 .rx_thresh = { 506 .pthresh = TXGBE_DEFAULT_RX_PTHRESH, 507 .hthresh = TXGBE_DEFAULT_RX_HTHRESH, 508 .wthresh = TXGBE_DEFAULT_RX_WTHRESH, 509 }, 510 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH, 511 .rx_drop_en = 0, 512 .offloads = 0, 513 }; 514 515 dev_info->default_txconf = (struct rte_eth_txconf) { 516 .tx_thresh = { 517 .pthresh = TXGBE_DEFAULT_TX_PTHRESH, 518 .hthresh = TXGBE_DEFAULT_TX_HTHRESH, 519 .wthresh = TXGBE_DEFAULT_TX_WTHRESH, 520 }, 521 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH, 522 .offloads = 0, 523 }; 524 525 dev_info->rx_desc_lim = rx_desc_lim; 526 dev_info->tx_desc_lim = tx_desc_lim; 527 528 return 0; 529 } 530 531 static int 532 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 533 { 534 return txgbe_dev_link_update_share(dev, wait_to_complete); 535 } 536 537 /* 538 * Virtual Function operations 539 */ 540 static void 541 txgbevf_intr_disable(struct rte_eth_dev *dev) 542 { 543 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 544 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 545 546 PMD_INIT_FUNC_TRACE(); 547 548 /* Clear interrupt mask to stop from interrupts being generated */ 549 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK); 550 551 txgbe_flush(hw); 552 553 /* Clear mask value. */ 554 intr->mask_misc = TXGBE_VFIMS_MASK; 555 } 556 557 static void 558 txgbevf_intr_enable(struct rte_eth_dev *dev) 559 { 560 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 561 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 562 563 PMD_INIT_FUNC_TRACE(); 564 565 /* VF enable interrupt autoclean */ 566 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK); 567 568 txgbe_flush(hw); 569 570 intr->mask_misc = 0; 571 } 572 573 static int 574 txgbevf_dev_configure(struct rte_eth_dev *dev) 575 { 576 struct rte_eth_conf *conf = &dev->data->dev_conf; 577 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev); 578 579 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d", 580 dev->data->port_id); 581 582 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 583 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 584 585 /* 586 * VF has no ability to enable/disable HW CRC 587 * Keep the persistent behavior the same as Host PF 588 */ 589 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC 590 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) { 591 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip"); 592 conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC; 593 } 594 #else 595 if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) { 596 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip"); 597 conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC; 598 } 599 #endif 600 601 /* 602 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk 603 * allocation or vector Rx preconditions we will reset it. 604 */ 605 adapter->rx_bulk_alloc_allowed = true; 606 607 return 0; 608 } 609 610 static int 611 txgbevf_dev_start(struct rte_eth_dev *dev) 612 { 613 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 614 uint32_t intr_vector = 0; 615 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 616 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 617 618 int err, mask = 0; 619 620 PMD_INIT_FUNC_TRACE(); 621 622 /* Stop the link setup handler before resetting the HW. */ 623 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev); 624 625 err = hw->mac.reset_hw(hw); 626 if (err) { 627 PMD_INIT_LOG(ERR, "Unable to reset vf hardware (%d)", err); 628 return err; 629 } 630 hw->mac.get_link_status = true; 631 hw->dev_start = true; 632 633 /* negotiate mailbox API version to use with the PF. */ 634 txgbevf_negotiate_api(hw); 635 636 txgbevf_dev_tx_init(dev); 637 638 /* This can fail when allocating mbufs for descriptor rings */ 639 err = txgbevf_dev_rx_init(dev); 640 641 /** 642 * In this case, reuses the MAC address assigned by VF 643 * initialization. 644 */ 645 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) { 646 PMD_INIT_LOG(ERR, "Unable to initialize RX hardware (%d)", err); 647 txgbe_dev_clear_queues(dev); 648 return err; 649 } 650 651 /* Set vfta */ 652 txgbevf_set_vfta_all(dev, 1); 653 654 /* Set HW strip */ 655 mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK | 656 ETH_VLAN_EXTEND_MASK; 657 err = txgbevf_vlan_offload_config(dev, mask); 658 if (err) { 659 PMD_INIT_LOG(ERR, "Unable to set VLAN offload (%d)", err); 660 txgbe_dev_clear_queues(dev); 661 return err; 662 } 663 664 txgbevf_dev_rxtx_start(dev); 665 666 /* check and configure queue intr-vector mapping */ 667 if (rte_intr_cap_multiple(intr_handle) && 668 dev->data->dev_conf.intr_conf.rxq) { 669 /* According to datasheet, only vector 0/1/2 can be used, 670 * now only one vector is used for Rx queue 671 */ 672 intr_vector = 1; 673 if (rte_intr_efd_enable(intr_handle, intr_vector)) 674 return -1; 675 } 676 677 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 678 intr_handle->intr_vec = 679 rte_zmalloc("intr_vec", 680 dev->data->nb_rx_queues * sizeof(int), 0); 681 if (intr_handle->intr_vec == NULL) { 682 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" 683 " intr_vec", dev->data->nb_rx_queues); 684 return -ENOMEM; 685 } 686 } 687 txgbevf_configure_msix(dev); 688 689 /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt 690 * is mapped to VFIO vector 0 in eth_txgbevf_dev_init( ). 691 * If previous VFIO interrupt mapping setting in eth_txgbevf_dev_init( ) 692 * is not cleared, it will fail when following rte_intr_enable( ) tries 693 * to map Rx queue interrupt to other VFIO vectors. 694 * So clear uio/vfio intr/evevnfd first to avoid failure. 695 */ 696 rte_intr_disable(intr_handle); 697 698 rte_intr_enable(intr_handle); 699 700 /* Re-enable interrupt for VF */ 701 txgbevf_intr_enable(dev); 702 703 /* 704 * Update link status right before return, because it may 705 * start link configuration process in a separate thread. 706 */ 707 txgbevf_dev_link_update(dev, 0); 708 709 hw->adapter_stopped = false; 710 711 return 0; 712 } 713 714 static int 715 txgbevf_dev_stop(struct rte_eth_dev *dev) 716 { 717 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 718 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev); 719 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 720 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 721 722 if (hw->adapter_stopped) 723 return 0; 724 725 PMD_INIT_FUNC_TRACE(); 726 727 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev); 728 729 txgbevf_intr_disable(dev); 730 731 hw->adapter_stopped = 1; 732 hw->mac.stop_hw(hw); 733 734 /* 735 * Clear what we set, but we still keep shadow_vfta to 736 * restore after device starts 737 */ 738 txgbevf_set_vfta_all(dev, 0); 739 740 /* Clear stored conf */ 741 dev->data->scattered_rx = 0; 742 743 txgbe_dev_clear_queues(dev); 744 745 /* Clean datapath event and queue/vec mapping */ 746 rte_intr_efd_disable(intr_handle); 747 if (intr_handle->intr_vec != NULL) { 748 rte_free(intr_handle->intr_vec); 749 intr_handle->intr_vec = NULL; 750 } 751 752 adapter->rss_reta_updated = 0; 753 hw->dev_start = false; 754 755 return 0; 756 } 757 758 static int 759 txgbevf_dev_close(struct rte_eth_dev *dev) 760 { 761 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 762 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 763 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 764 int ret; 765 766 PMD_INIT_FUNC_TRACE(); 767 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 768 return 0; 769 770 hw->mac.reset_hw(hw); 771 772 ret = txgbevf_dev_stop(dev); 773 774 txgbe_dev_free_queues(dev); 775 776 /** 777 * Remove the VF MAC address ro ensure 778 * that the VF traffic goes to the PF 779 * after stop, close and detach of the VF 780 **/ 781 txgbevf_remove_mac_addr(dev, 0); 782 783 dev->rx_pkt_burst = NULL; 784 dev->tx_pkt_burst = NULL; 785 786 /* Disable the interrupts for VF */ 787 txgbevf_intr_disable(dev); 788 789 rte_free(dev->data->mac_addrs); 790 dev->data->mac_addrs = NULL; 791 792 rte_intr_disable(intr_handle); 793 rte_intr_callback_unregister(intr_handle, 794 txgbevf_dev_interrupt_handler, dev); 795 796 return ret; 797 } 798 799 /* 800 * Reset VF device 801 */ 802 static int 803 txgbevf_dev_reset(struct rte_eth_dev *dev) 804 { 805 int ret; 806 807 ret = eth_txgbevf_dev_uninit(dev); 808 if (ret) 809 return ret; 810 811 ret = eth_txgbevf_dev_init(dev); 812 813 return ret; 814 } 815 816 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) 817 { 818 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 819 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev); 820 int i = 0, j = 0, vfta = 0, mask = 1; 821 822 for (i = 0; i < TXGBE_VFTA_SIZE; i++) { 823 vfta = shadow_vfta->vfta[i]; 824 if (vfta) { 825 mask = 1; 826 for (j = 0; j < 32; j++) { 827 if (vfta & mask) 828 hw->mac.set_vfta(hw, (i << 5) + j, 0, 829 on, false); 830 mask <<= 1; 831 } 832 } 833 } 834 } 835 836 static int 837 txgbevf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 838 { 839 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 840 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev); 841 uint32_t vid_idx = 0; 842 uint32_t vid_bit = 0; 843 int ret = 0; 844 845 PMD_INIT_FUNC_TRACE(); 846 847 /* vind is not used in VF driver, set to 0, check txgbe_set_vfta_vf */ 848 ret = hw->mac.set_vfta(hw, vlan_id, 0, !!on, false); 849 if (ret) { 850 PMD_INIT_LOG(ERR, "Unable to set VF vlan"); 851 return ret; 852 } 853 vid_idx = (uint32_t)((vlan_id >> 5) & 0x7F); 854 vid_bit = (uint32_t)(1 << (vlan_id & 0x1F)); 855 856 /* Save what we set and restore it after device reset */ 857 if (on) 858 shadow_vfta->vfta[vid_idx] |= vid_bit; 859 else 860 shadow_vfta->vfta[vid_idx] &= ~vid_bit; 861 862 return 0; 863 } 864 865 static void 866 txgbevf_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) 867 { 868 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 869 uint32_t ctrl; 870 871 PMD_INIT_FUNC_TRACE(); 872 873 if (queue >= hw->mac.max_rx_queues) 874 return; 875 876 ctrl = rd32(hw, TXGBE_RXCFG(queue)); 877 txgbe_dev_save_rx_queue(hw, queue); 878 if (on) 879 ctrl |= TXGBE_RXCFG_VLAN; 880 else 881 ctrl &= ~TXGBE_RXCFG_VLAN; 882 wr32(hw, TXGBE_RXCFG(queue), 0); 883 msec_delay(100); 884 txgbe_dev_store_rx_queue(hw, queue); 885 wr32m(hw, TXGBE_RXCFG(queue), 886 TXGBE_RXCFG_VLAN | TXGBE_RXCFG_ENA, ctrl); 887 888 txgbe_vlan_hw_strip_bitmap_set(dev, queue, on); 889 } 890 891 static int 892 txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask) 893 { 894 struct txgbe_rx_queue *rxq; 895 uint16_t i; 896 int on = 0; 897 898 /* VF function only support hw strip feature, others are not support */ 899 if (mask & ETH_VLAN_STRIP_MASK) { 900 for (i = 0; i < dev->data->nb_rx_queues; i++) { 901 rxq = dev->data->rx_queues[i]; 902 on = !!(rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 903 txgbevf_vlan_strip_queue_set(dev, i, on); 904 } 905 } 906 907 return 0; 908 } 909 910 static int 911 txgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask) 912 { 913 txgbe_config_vlan_strip_on_all_queues(dev, mask); 914 915 txgbevf_vlan_offload_config(dev, mask); 916 917 return 0; 918 } 919 920 static int 921 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 922 { 923 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 924 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 925 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 926 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 927 uint32_t vec = TXGBE_MISC_VEC_ID; 928 929 if (rte_intr_allow_others(intr_handle)) 930 vec = TXGBE_RX_VEC_START; 931 intr->mask_misc &= ~(1 << vec); 932 RTE_SET_USED(queue_id); 933 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc); 934 935 rte_intr_enable(intr_handle); 936 937 return 0; 938 } 939 940 static int 941 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 942 { 943 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 944 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 945 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 946 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 947 uint32_t vec = TXGBE_MISC_VEC_ID; 948 949 if (rte_intr_allow_others(intr_handle)) 950 vec = TXGBE_RX_VEC_START; 951 intr->mask_misc |= (1 << vec); 952 RTE_SET_USED(queue_id); 953 wr32(hw, TXGBE_VFIMS, intr->mask_misc); 954 955 return 0; 956 } 957 958 static void 959 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction, 960 uint8_t queue, uint8_t msix_vector) 961 { 962 uint32_t tmp, idx; 963 964 if (direction == -1) { 965 /* other causes */ 966 msix_vector |= TXGBE_VFIVAR_VLD; 967 tmp = rd32(hw, TXGBE_VFIVARMISC); 968 tmp &= ~0xFF; 969 tmp |= msix_vector; 970 wr32(hw, TXGBE_VFIVARMISC, tmp); 971 } else { 972 /* rx or tx cause */ 973 /* Workround for ICR lost */ 974 idx = ((16 * (queue & 1)) + (8 * direction)); 975 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1)); 976 tmp &= ~(0xFF << idx); 977 tmp |= (msix_vector << idx); 978 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp); 979 } 980 } 981 982 static void 983 txgbevf_configure_msix(struct rte_eth_dev *dev) 984 { 985 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 986 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 987 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 988 uint32_t q_idx; 989 uint32_t vector_idx = TXGBE_MISC_VEC_ID; 990 uint32_t base = TXGBE_MISC_VEC_ID; 991 992 /* Configure VF other cause ivar */ 993 txgbevf_set_ivar_map(hw, -1, 1, vector_idx); 994 995 /* won't configure msix register if no mapping is done 996 * between intr vector and event fd. 997 */ 998 if (!rte_intr_dp_is_en(intr_handle)) 999 return; 1000 1001 if (rte_intr_allow_others(intr_handle)) { 1002 base = TXGBE_RX_VEC_START; 1003 vector_idx = TXGBE_RX_VEC_START; 1004 } 1005 1006 /* Configure all RX queues of VF */ 1007 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) { 1008 /* Force all queue use vector 0, 1009 * as TXGBE_VF_MAXMSIVECOTR = 1 1010 */ 1011 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); 1012 intr_handle->intr_vec[q_idx] = vector_idx; 1013 if (vector_idx < base + intr_handle->nb_efd - 1) 1014 vector_idx++; 1015 } 1016 1017 /* As RX queue setting above show, all queues use the vector 0. 1018 * Set only the ITR value of TXGBE_MISC_VEC_ID. 1019 */ 1020 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID), 1021 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT) 1022 | TXGBE_ITR_WRDSA); 1023 } 1024 1025 static int 1026 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr, 1027 __rte_unused uint32_t index, 1028 __rte_unused uint32_t pool) 1029 { 1030 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1031 int err; 1032 1033 /* 1034 * On a VF, adding again the same MAC addr is not an idempotent 1035 * operation. Trap this case to avoid exhausting the [very limited] 1036 * set of PF resources used to store VF MAC addresses. 1037 */ 1038 if (memcmp(hw->mac.perm_addr, mac_addr, 1039 sizeof(struct rte_ether_addr)) == 0) 1040 return -1; 1041 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes); 1042 if (err != 0) 1043 PMD_DRV_LOG(ERR, "Unable to add MAC address " 1044 "%02x:%02x:%02x:%02x:%02x:%02x - err=%d", 1045 mac_addr->addr_bytes[0], 1046 mac_addr->addr_bytes[1], 1047 mac_addr->addr_bytes[2], 1048 mac_addr->addr_bytes[3], 1049 mac_addr->addr_bytes[4], 1050 mac_addr->addr_bytes[5], 1051 err); 1052 return err; 1053 } 1054 1055 static void 1056 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1057 { 1058 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1059 struct rte_ether_addr *perm_addr = 1060 (struct rte_ether_addr *)hw->mac.perm_addr; 1061 struct rte_ether_addr *mac_addr; 1062 uint32_t i; 1063 int err; 1064 1065 /* 1066 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does 1067 * not support the deletion of a given MAC address. 1068 * Instead, it imposes to delete all MAC addresses, then to add again 1069 * all MAC addresses with the exception of the one to be deleted. 1070 */ 1071 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL); 1072 1073 /* 1074 * Add again all MAC addresses, with the exception of the deleted one 1075 * and of the permanent MAC address. 1076 */ 1077 for (i = 0, mac_addr = dev->data->mac_addrs; 1078 i < hw->mac.num_rar_entries; i++, mac_addr++) { 1079 /* Skip the deleted MAC address */ 1080 if (i == index) 1081 continue; 1082 /* Skip NULL MAC addresses */ 1083 if (rte_is_zero_ether_addr(mac_addr)) 1084 continue; 1085 /* Skip the permanent MAC address */ 1086 if (memcmp(perm_addr, mac_addr, 1087 sizeof(struct rte_ether_addr)) == 0) 1088 continue; 1089 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes); 1090 if (err != 0) 1091 PMD_DRV_LOG(ERR, 1092 "Adding again MAC address " 1093 "%02x:%02x:%02x:%02x:%02x:%02x failed " 1094 "err=%d", 1095 mac_addr->addr_bytes[0], 1096 mac_addr->addr_bytes[1], 1097 mac_addr->addr_bytes[2], 1098 mac_addr->addr_bytes[3], 1099 mac_addr->addr_bytes[4], 1100 mac_addr->addr_bytes[5], 1101 err); 1102 } 1103 } 1104 1105 static int 1106 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev, 1107 struct rte_ether_addr *addr) 1108 { 1109 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1110 1111 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0); 1112 1113 return 0; 1114 } 1115 1116 static int 1117 txgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1118 { 1119 struct txgbe_hw *hw; 1120 uint32_t max_frame = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN; 1121 struct rte_eth_dev_data *dev_data = dev->data; 1122 1123 hw = TXGBE_DEV_HW(dev); 1124 1125 if (mtu < RTE_ETHER_MIN_MTU || 1126 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN) 1127 return -EINVAL; 1128 1129 /* If device is started, refuse mtu that requires the support of 1130 * scattered packets when this feature has not been enabled before. 1131 */ 1132 if (dev_data->dev_started && !dev_data->scattered_rx && 1133 (max_frame + 2 * TXGBE_VLAN_TAG_SIZE > 1134 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) { 1135 PMD_INIT_LOG(ERR, "Stop port first."); 1136 return -EINVAL; 1137 } 1138 1139 /* 1140 * When supported by the underlying PF driver, use the TXGBE_VF_SET_MTU 1141 * request of the version 2.0 of the mailbox API. 1142 * For now, use the TXGBE_VF_SET_LPE request of the version 1.0 1143 * of the mailbox API. 1144 */ 1145 if (txgbevf_rlpml_set_vf(hw, max_frame)) 1146 return -EINVAL; 1147 1148 /* update max frame size */ 1149 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame; 1150 return 0; 1151 } 1152 1153 static int 1154 txgbevf_get_reg_length(struct rte_eth_dev *dev __rte_unused) 1155 { 1156 int count = 0; 1157 int g_ind = 0; 1158 const struct reg_info *reg_group; 1159 1160 while ((reg_group = txgbevf_regs[g_ind++])) 1161 count += txgbe_regs_group_count(reg_group); 1162 1163 return count; 1164 } 1165 1166 static int 1167 txgbevf_get_regs(struct rte_eth_dev *dev, 1168 struct rte_dev_reg_info *regs) 1169 { 1170 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1171 uint32_t *data = regs->data; 1172 int g_ind = 0; 1173 int count = 0; 1174 const struct reg_info *reg_group; 1175 1176 if (data == NULL) { 1177 regs->length = txgbevf_get_reg_length(dev); 1178 regs->width = sizeof(uint32_t); 1179 return 0; 1180 } 1181 1182 /* Support only full register dump */ 1183 if (regs->length == 0 || 1184 regs->length == (uint32_t)txgbevf_get_reg_length(dev)) { 1185 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 1186 hw->device_id; 1187 while ((reg_group = txgbevf_regs[g_ind++])) 1188 count += txgbe_read_regs_group(dev, &data[count], 1189 reg_group); 1190 return 0; 1191 } 1192 1193 return -ENOTSUP; 1194 } 1195 1196 static int 1197 txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev) 1198 { 1199 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1200 int ret; 1201 1202 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_PROMISC)) { 1203 case 0: 1204 ret = 0; 1205 break; 1206 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1207 ret = -ENOTSUP; 1208 break; 1209 default: 1210 ret = -EAGAIN; 1211 break; 1212 } 1213 1214 return ret; 1215 } 1216 1217 static int 1218 txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev) 1219 { 1220 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1221 int ret; 1222 1223 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) { 1224 case 0: 1225 ret = 0; 1226 break; 1227 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1228 ret = -ENOTSUP; 1229 break; 1230 default: 1231 ret = -EAGAIN; 1232 break; 1233 } 1234 1235 return ret; 1236 } 1237 1238 static int 1239 txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev) 1240 { 1241 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1242 int ret; 1243 1244 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) { 1245 case 0: 1246 ret = 0; 1247 break; 1248 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1249 ret = -ENOTSUP; 1250 break; 1251 default: 1252 ret = -EAGAIN; 1253 break; 1254 } 1255 1256 return ret; 1257 } 1258 1259 static int 1260 txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev) 1261 { 1262 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1263 int ret; 1264 1265 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) { 1266 case 0: 1267 ret = 0; 1268 break; 1269 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1270 ret = -ENOTSUP; 1271 break; 1272 default: 1273 ret = -EAGAIN; 1274 break; 1275 } 1276 1277 return ret; 1278 } 1279 1280 static void txgbevf_mbx_process(struct rte_eth_dev *dev) 1281 { 1282 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1283 u32 in_msg = 0; 1284 1285 /* peek the message first */ 1286 in_msg = rd32(hw, TXGBE_VFMBX); 1287 1288 /* PF reset VF event */ 1289 if (in_msg == TXGBE_PF_CONTROL_MSG) { 1290 /* dummy mbx read to ack pf */ 1291 if (txgbe_read_mbx(hw, &in_msg, 1, 0)) 1292 return; 1293 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET, 1294 NULL); 1295 } 1296 } 1297 1298 static int 1299 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev) 1300 { 1301 uint32_t eicr; 1302 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1303 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 1304 txgbevf_intr_disable(dev); 1305 1306 /* read-on-clear nic registers here */ 1307 eicr = rd32(hw, TXGBE_VFICR); 1308 intr->flags = 0; 1309 1310 /* only one misc vector supported - mailbox */ 1311 eicr &= TXGBE_VFICR_MASK; 1312 /* Workround for ICR lost */ 1313 intr->flags |= TXGBE_FLAG_MAILBOX; 1314 1315 return 0; 1316 } 1317 1318 static int 1319 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev) 1320 { 1321 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 1322 1323 if (intr->flags & TXGBE_FLAG_MAILBOX) { 1324 txgbevf_mbx_process(dev); 1325 intr->flags &= ~TXGBE_FLAG_MAILBOX; 1326 } 1327 1328 txgbevf_intr_enable(dev); 1329 1330 return 0; 1331 } 1332 1333 static void 1334 txgbevf_dev_interrupt_handler(void *param) 1335 { 1336 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1337 1338 txgbevf_dev_interrupt_get_status(dev); 1339 txgbevf_dev_interrupt_action(dev); 1340 } 1341 1342 /* 1343 * dev_ops for virtual function, bare necessities for basic vf 1344 * operation have been implemented 1345 */ 1346 static const struct eth_dev_ops txgbevf_eth_dev_ops = { 1347 .dev_configure = txgbevf_dev_configure, 1348 .dev_start = txgbevf_dev_start, 1349 .dev_stop = txgbevf_dev_stop, 1350 .link_update = txgbevf_dev_link_update, 1351 .stats_get = txgbevf_dev_stats_get, 1352 .xstats_get = txgbevf_dev_xstats_get, 1353 .stats_reset = txgbevf_dev_stats_reset, 1354 .xstats_reset = txgbevf_dev_stats_reset, 1355 .xstats_get_names = txgbevf_dev_xstats_get_names, 1356 .dev_close = txgbevf_dev_close, 1357 .dev_reset = txgbevf_dev_reset, 1358 .promiscuous_enable = txgbevf_dev_promiscuous_enable, 1359 .promiscuous_disable = txgbevf_dev_promiscuous_disable, 1360 .allmulticast_enable = txgbevf_dev_allmulticast_enable, 1361 .allmulticast_disable = txgbevf_dev_allmulticast_disable, 1362 .dev_infos_get = txgbevf_dev_info_get, 1363 .dev_supported_ptypes_get = txgbe_dev_supported_ptypes_get, 1364 .mtu_set = txgbevf_dev_set_mtu, 1365 .vlan_filter_set = txgbevf_vlan_filter_set, 1366 .vlan_strip_queue_set = txgbevf_vlan_strip_queue_set, 1367 .vlan_offload_set = txgbevf_vlan_offload_set, 1368 .rx_queue_setup = txgbe_dev_rx_queue_setup, 1369 .rx_queue_release = txgbe_dev_rx_queue_release, 1370 .tx_queue_setup = txgbe_dev_tx_queue_setup, 1371 .tx_queue_release = txgbe_dev_tx_queue_release, 1372 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable, 1373 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable, 1374 .mac_addr_add = txgbevf_add_mac_addr, 1375 .mac_addr_remove = txgbevf_remove_mac_addr, 1376 .set_mc_addr_list = txgbe_dev_set_mc_addr_list, 1377 .rxq_info_get = txgbe_rxq_info_get, 1378 .txq_info_get = txgbe_txq_info_get, 1379 .mac_addr_set = txgbevf_set_default_mac_addr, 1380 .get_reg = txgbevf_get_regs, 1381 .reta_update = txgbe_dev_rss_reta_update, 1382 .reta_query = txgbe_dev_rss_reta_query, 1383 .rss_hash_update = txgbe_dev_rss_hash_update, 1384 .rss_hash_conf_get = txgbe_dev_rss_hash_conf_get, 1385 .tx_done_cleanup = txgbe_dev_tx_done_cleanup, 1386 }; 1387 1388 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd); 1389 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map); 1390 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci"); 1391