1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2015-2020 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <rte_log.h> 11 #include <ethdev_pci.h> 12 #include <rte_alarm.h> 13 14 #include "txgbe_logs.h" 15 #include "base/txgbe.h" 16 #include "txgbe_ethdev.h" 17 #include "txgbe_rxtx.h" 18 #include "txgbe_regs_group.h" 19 20 static const struct reg_info txgbevf_regs_general[] = { 21 {TXGBE_VFRST, 1, 1, "TXGBE_VFRST"}, 22 {TXGBE_VFSTATUS, 1, 1, "TXGBE_VFSTATUS"}, 23 {TXGBE_VFMBCTL, 1, 1, "TXGBE_VFMAILBOX"}, 24 {TXGBE_VFMBX, 16, 4, "TXGBE_VFMBX"}, 25 {TXGBE_VFPBWRAP, 1, 1, "TXGBE_VFPBWRAP"}, 26 {0, 0, 0, ""} 27 }; 28 29 static const struct reg_info txgbevf_regs_interrupt[] = { 30 {0, 0, 0, ""} 31 }; 32 33 static const struct reg_info txgbevf_regs_rxdma[] = { 34 {0, 0, 0, ""} 35 }; 36 37 static const struct reg_info txgbevf_regs_tx[] = { 38 {0, 0, 0, ""} 39 }; 40 41 /* VF registers */ 42 static const struct reg_info *txgbevf_regs[] = { 43 txgbevf_regs_general, 44 txgbevf_regs_interrupt, 45 txgbevf_regs_rxdma, 46 txgbevf_regs_tx, 47 NULL}; 48 49 static int txgbevf_dev_xstats_get(struct rte_eth_dev *dev, 50 struct rte_eth_xstat *xstats, unsigned int n); 51 static int txgbevf_dev_info_get(struct rte_eth_dev *dev, 52 struct rte_eth_dev_info *dev_info); 53 static int txgbevf_dev_configure(struct rte_eth_dev *dev); 54 static int txgbevf_dev_start(struct rte_eth_dev *dev); 55 static int txgbevf_dev_link_update(struct rte_eth_dev *dev, 56 int wait_to_complete); 57 static int txgbevf_dev_stop(struct rte_eth_dev *dev); 58 static int txgbevf_dev_close(struct rte_eth_dev *dev); 59 static void txgbevf_intr_disable(struct rte_eth_dev *dev); 60 static void txgbevf_intr_enable(struct rte_eth_dev *dev); 61 static int txgbevf_dev_stats_reset(struct rte_eth_dev *dev); 62 static int txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask); 63 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on); 64 static void txgbevf_configure_msix(struct rte_eth_dev *dev); 65 static int txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev); 66 static int txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev); 67 static void txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index); 68 static void txgbevf_dev_interrupt_handler(void *param); 69 70 /* 71 * The set of PCI devices this driver supports (for VF) 72 */ 73 static const struct rte_pci_id pci_id_txgbevf_map[] = { 74 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_SP1000_VF) }, 75 { RTE_PCI_DEVICE(PCI_VENDOR_ID_WANGXUN, TXGBE_DEV_ID_WX1820_VF) }, 76 { .vendor_id = 0, /* sentinel */ }, 77 }; 78 79 static const struct rte_eth_desc_lim rx_desc_lim = { 80 .nb_max = TXGBE_RING_DESC_MAX, 81 .nb_min = TXGBE_RING_DESC_MIN, 82 .nb_align = TXGBE_RXD_ALIGN, 83 }; 84 85 static const struct rte_eth_desc_lim tx_desc_lim = { 86 .nb_max = TXGBE_RING_DESC_MAX, 87 .nb_min = TXGBE_RING_DESC_MIN, 88 .nb_align = TXGBE_TXD_ALIGN, 89 .nb_seg_max = TXGBE_TX_MAX_SEG, 90 .nb_mtu_seg_max = TXGBE_TX_MAX_SEG, 91 }; 92 93 static const struct eth_dev_ops txgbevf_eth_dev_ops; 94 95 static const struct rte_txgbe_xstats_name_off rte_txgbevf_stats_strings[] = { 96 {"rx_multicast_packets_0", 97 offsetof(struct txgbevf_hw_stats, qp[0].vfmprc)}, 98 {"rx_multicast_packets_1", 99 offsetof(struct txgbevf_hw_stats, qp[1].vfmprc)}, 100 {"rx_multicast_packets_2", 101 offsetof(struct txgbevf_hw_stats, qp[2].vfmprc)}, 102 {"rx_multicast_packets_3", 103 offsetof(struct txgbevf_hw_stats, qp[3].vfmprc)}, 104 {"rx_multicast_packets_4", 105 offsetof(struct txgbevf_hw_stats, qp[4].vfmprc)}, 106 {"rx_multicast_packets_5", 107 offsetof(struct txgbevf_hw_stats, qp[5].vfmprc)}, 108 {"rx_multicast_packets_6", 109 offsetof(struct txgbevf_hw_stats, qp[6].vfmprc)}, 110 {"rx_multicast_packets_7", 111 offsetof(struct txgbevf_hw_stats, qp[7].vfmprc)} 112 }; 113 114 #define TXGBEVF_NB_XSTATS (sizeof(rte_txgbevf_stats_strings) / \ 115 sizeof(rte_txgbevf_stats_strings[0])) 116 117 /* 118 * Negotiate mailbox API version with the PF. 119 * After reset API version is always set to the basic one (txgbe_mbox_api_10). 120 * Then we try to negotiate starting with the most recent one. 121 * If all negotiation attempts fail, then we will proceed with 122 * the default one (txgbe_mbox_api_10). 123 */ 124 static void 125 txgbevf_negotiate_api(struct txgbe_hw *hw) 126 { 127 int32_t i; 128 129 /* start with highest supported, proceed down */ 130 static const int sup_ver[] = { 131 txgbe_mbox_api_13, 132 txgbe_mbox_api_12, 133 txgbe_mbox_api_11, 134 txgbe_mbox_api_10, 135 }; 136 137 for (i = 0; i < ARRAY_SIZE(sup_ver); i++) { 138 if (txgbevf_negotiate_api_version(hw, sup_ver[i]) == 0) 139 break; 140 } 141 } 142 143 static void 144 generate_random_mac_addr(struct rte_ether_addr *mac_addr) 145 { 146 uint64_t random; 147 148 /* Set Organizationally Unique Identifier (OUI) prefix. */ 149 mac_addr->addr_bytes[0] = 0x00; 150 mac_addr->addr_bytes[1] = 0x09; 151 mac_addr->addr_bytes[2] = 0xC0; 152 /* Force indication of locally assigned MAC address. */ 153 mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR; 154 /* Generate the last 3 bytes of the MAC address with a random number. */ 155 random = rte_rand(); 156 memcpy(&mac_addr->addr_bytes[3], &random, 3); 157 } 158 159 /* 160 * Virtual Function device init 161 */ 162 static int 163 eth_txgbevf_dev_init(struct rte_eth_dev *eth_dev) 164 { 165 int err; 166 uint32_t tc, tcs; 167 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 168 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 169 struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev); 170 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev); 171 struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev); 172 struct rte_ether_addr *perm_addr = 173 (struct rte_ether_addr *)hw->mac.perm_addr; 174 175 PMD_INIT_FUNC_TRACE(); 176 177 eth_dev->dev_ops = &txgbevf_eth_dev_ops; 178 eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status; 179 eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status; 180 eth_dev->rx_pkt_burst = &txgbe_recv_pkts; 181 eth_dev->tx_pkt_burst = &txgbe_xmit_pkts; 182 183 /* for secondary processes, we don't initialise any further as primary 184 * has already done this work. Only check we don't need a different 185 * RX function 186 */ 187 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 188 struct txgbe_tx_queue *txq; 189 uint16_t nb_tx_queues = eth_dev->data->nb_tx_queues; 190 /* TX queue function in primary, set by last queue initialized 191 * Tx queue may not initialized by primary process 192 */ 193 if (eth_dev->data->tx_queues) { 194 txq = eth_dev->data->tx_queues[nb_tx_queues - 1]; 195 txgbe_set_tx_function(eth_dev, txq); 196 } else { 197 /* Use default TX function if we get here */ 198 PMD_INIT_LOG(NOTICE, 199 "No TX queues configured yet. Using default TX function."); 200 } 201 202 txgbe_set_rx_function(eth_dev); 203 204 return 0; 205 } 206 207 rte_eth_copy_pci_info(eth_dev, pci_dev); 208 209 hw->device_id = pci_dev->id.device_id; 210 hw->vendor_id = pci_dev->id.vendor_id; 211 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 212 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 213 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 214 215 /* initialize the vfta */ 216 memset(shadow_vfta, 0, sizeof(*shadow_vfta)); 217 218 /* initialize the hw strip bitmap*/ 219 memset(hwstrip, 0, sizeof(*hwstrip)); 220 221 /* Initialize the shared code (base driver) */ 222 err = txgbe_init_shared_code(hw); 223 if (err != 0) { 224 PMD_INIT_LOG(ERR, 225 "Shared code init failed for txgbevf: %d", err); 226 return -EIO; 227 } 228 229 /* init_mailbox_params */ 230 hw->mbx.init_params(hw); 231 232 /* Reset the hw statistics */ 233 txgbevf_dev_stats_reset(eth_dev); 234 235 /* Disable the interrupts for VF */ 236 txgbevf_intr_disable(eth_dev); 237 238 hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */ 239 err = hw->mac.reset_hw(hw); 240 241 /* 242 * The VF reset operation returns the TXGBE_ERR_INVALID_MAC_ADDR when 243 * the underlying PF driver has not assigned a MAC address to the VF. 244 * In this case, assign a random MAC address. 245 */ 246 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) { 247 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err); 248 /* 249 * This error code will be propagated to the app by 250 * rte_eth_dev_reset, so use a public error code rather than 251 * the internal-only TXGBE_ERR_RESET_FAILED 252 */ 253 return -EAGAIN; 254 } 255 256 /* negotiate mailbox API version to use with the PF. */ 257 txgbevf_negotiate_api(hw); 258 259 /* Get Rx/Tx queue count via mailbox, which is ready after reset_hw */ 260 txgbevf_get_queues(hw, &tcs, &tc); 261 262 /* Allocate memory for storing MAC addresses */ 263 eth_dev->data->mac_addrs = rte_zmalloc("txgbevf", RTE_ETHER_ADDR_LEN * 264 hw->mac.num_rar_entries, 0); 265 if (eth_dev->data->mac_addrs == NULL) { 266 PMD_INIT_LOG(ERR, 267 "Failed to allocate %u bytes needed to store " 268 "MAC addresses", 269 RTE_ETHER_ADDR_LEN * hw->mac.num_rar_entries); 270 return -ENOMEM; 271 } 272 273 /* Generate a random MAC address, if none was assigned by PF. */ 274 if (rte_is_zero_ether_addr(perm_addr)) { 275 generate_random_mac_addr(perm_addr); 276 err = txgbe_set_rar_vf(hw, 1, perm_addr->addr_bytes, 0, 1); 277 if (err) { 278 rte_free(eth_dev->data->mac_addrs); 279 eth_dev->data->mac_addrs = NULL; 280 return err; 281 } 282 PMD_INIT_LOG(INFO, "\tVF MAC address not assigned by Host PF"); 283 PMD_INIT_LOG(INFO, "\tAssign randomly generated MAC address " 284 "%02x:%02x:%02x:%02x:%02x:%02x", 285 perm_addr->addr_bytes[0], 286 perm_addr->addr_bytes[1], 287 perm_addr->addr_bytes[2], 288 perm_addr->addr_bytes[3], 289 perm_addr->addr_bytes[4], 290 perm_addr->addr_bytes[5]); 291 } 292 293 /* Copy the permanent MAC address */ 294 rte_ether_addr_copy(perm_addr, ð_dev->data->mac_addrs[0]); 295 296 /* reset the hardware with the new settings */ 297 err = hw->mac.start_hw(hw); 298 if (err) { 299 PMD_INIT_LOG(ERR, "VF Initialization Failure: %d", err); 300 return -EIO; 301 } 302 303 /* enter promiscuous mode */ 304 txgbevf_dev_promiscuous_enable(eth_dev); 305 306 rte_intr_callback_register(intr_handle, 307 txgbevf_dev_interrupt_handler, eth_dev); 308 rte_intr_enable(intr_handle); 309 txgbevf_intr_enable(eth_dev); 310 311 PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s", 312 eth_dev->data->port_id, pci_dev->id.vendor_id, 313 pci_dev->id.device_id, "txgbe_mac_raptor_vf"); 314 315 return 0; 316 } 317 318 /* Virtual Function device uninit */ 319 static int 320 eth_txgbevf_dev_uninit(struct rte_eth_dev *eth_dev) 321 { 322 PMD_INIT_FUNC_TRACE(); 323 324 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 325 return 0; 326 327 txgbevf_dev_close(eth_dev); 328 329 return 0; 330 } 331 332 static int eth_txgbevf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 333 struct rte_pci_device *pci_dev) 334 { 335 return rte_eth_dev_pci_generic_probe(pci_dev, 336 sizeof(struct txgbe_adapter), eth_txgbevf_dev_init); 337 } 338 339 static int eth_txgbevf_pci_remove(struct rte_pci_device *pci_dev) 340 { 341 return rte_eth_dev_pci_generic_remove(pci_dev, eth_txgbevf_dev_uninit); 342 } 343 344 /* 345 * virtual function driver struct 346 */ 347 static struct rte_pci_driver rte_txgbevf_pmd = { 348 .id_table = pci_id_txgbevf_map, 349 .drv_flags = RTE_PCI_DRV_NEED_MAPPING, 350 .probe = eth_txgbevf_pci_probe, 351 .remove = eth_txgbevf_pci_remove, 352 }; 353 354 static int txgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 355 struct rte_eth_xstat_name *xstats_names, unsigned int limit) 356 { 357 unsigned int i; 358 359 if (limit < TXGBEVF_NB_XSTATS && xstats_names != NULL) 360 return -ENOMEM; 361 362 if (xstats_names != NULL) 363 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) 364 snprintf(xstats_names[i].name, 365 sizeof(xstats_names[i].name), 366 "%s", rte_txgbevf_stats_strings[i].name); 367 return TXGBEVF_NB_XSTATS; 368 } 369 370 static void 371 txgbevf_update_stats(struct rte_eth_dev *dev) 372 { 373 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 374 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 375 TXGBE_DEV_STATS(dev); 376 unsigned int i; 377 378 for (i = 0; i < dev->data->nb_rx_queues; i++) { 379 /* Good Rx packet, include VF loopback */ 380 TXGBE_UPDCNT32(TXGBE_QPRXPKT(i), 381 hw_stats->qp[i].last_vfgprc, hw_stats->qp[i].vfgprc); 382 383 /* Good Rx octets, include VF loopback */ 384 TXGBE_UPDCNT36(TXGBE_QPRXOCTL(i), 385 hw_stats->qp[i].last_vfgorc, hw_stats->qp[i].vfgorc); 386 387 /* Rx Multicst Packet */ 388 TXGBE_UPDCNT32(TXGBE_QPRXMPKT(i), 389 hw_stats->qp[i].last_vfmprc, hw_stats->qp[i].vfmprc); 390 } 391 hw->rx_loaded = 0; 392 393 for (i = 0; i < dev->data->nb_tx_queues; i++) { 394 /* Good Tx packet, include VF loopback */ 395 TXGBE_UPDCNT32(TXGBE_QPTXPKT(i), 396 hw_stats->qp[i].last_vfgptc, hw_stats->qp[i].vfgptc); 397 398 /* Good Tx octets, include VF loopback */ 399 TXGBE_UPDCNT36(TXGBE_QPTXOCTL(i), 400 hw_stats->qp[i].last_vfgotc, hw_stats->qp[i].vfgotc); 401 } 402 hw->offset_loaded = 0; 403 } 404 405 static int 406 txgbevf_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 407 unsigned int n) 408 { 409 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 410 TXGBE_DEV_STATS(dev); 411 unsigned int i; 412 413 if (n < TXGBEVF_NB_XSTATS) 414 return TXGBEVF_NB_XSTATS; 415 416 txgbevf_update_stats(dev); 417 418 if (!xstats) 419 return 0; 420 421 /* Extended stats */ 422 for (i = 0; i < TXGBEVF_NB_XSTATS; i++) { 423 xstats[i].id = i; 424 xstats[i].value = *(uint64_t *)(((char *)hw_stats) + 425 rte_txgbevf_stats_strings[i].offset); 426 } 427 428 return TXGBEVF_NB_XSTATS; 429 } 430 431 static int 432 txgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 433 { 434 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 435 TXGBE_DEV_STATS(dev); 436 uint32_t i; 437 438 txgbevf_update_stats(dev); 439 440 if (stats == NULL) 441 return -EINVAL; 442 443 stats->ipackets = 0; 444 stats->ibytes = 0; 445 stats->opackets = 0; 446 stats->obytes = 0; 447 448 for (i = 0; i < 8; i++) { 449 stats->ipackets += hw_stats->qp[i].vfgprc; 450 stats->ibytes += hw_stats->qp[i].vfgorc; 451 stats->opackets += hw_stats->qp[i].vfgptc; 452 stats->obytes += hw_stats->qp[i].vfgotc; 453 } 454 455 return 0; 456 } 457 458 static int 459 txgbevf_dev_stats_reset(struct rte_eth_dev *dev) 460 { 461 struct txgbevf_hw_stats *hw_stats = (struct txgbevf_hw_stats *) 462 TXGBE_DEV_STATS(dev); 463 uint32_t i; 464 465 /* Sync HW register to the last stats */ 466 txgbevf_dev_stats_get(dev, NULL); 467 468 /* reset HW current stats*/ 469 for (i = 0; i < 8; i++) { 470 hw_stats->qp[i].vfgprc = 0; 471 hw_stats->qp[i].vfgorc = 0; 472 hw_stats->qp[i].vfgptc = 0; 473 hw_stats->qp[i].vfgotc = 0; 474 } 475 476 return 0; 477 } 478 479 static int 480 txgbevf_dev_info_get(struct rte_eth_dev *dev, 481 struct rte_eth_dev_info *dev_info) 482 { 483 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 484 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 485 486 dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues; 487 dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues; 488 dev_info->min_rx_bufsize = 1024; 489 dev_info->max_rx_pktlen = TXGBE_FRAME_SIZE_MAX; 490 dev_info->max_mac_addrs = hw->mac.num_rar_entries; 491 dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC; 492 dev_info->max_vfs = pci_dev->max_vfs; 493 dev_info->max_vmdq_pools = ETH_64_POOLS; 494 dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev); 495 dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) | 496 dev_info->rx_queue_offload_capa); 497 dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev); 498 dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev); 499 dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t); 500 dev_info->reta_size = ETH_RSS_RETA_SIZE_128; 501 dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL; 502 503 dev_info->default_rxconf = (struct rte_eth_rxconf) { 504 .rx_thresh = { 505 .pthresh = TXGBE_DEFAULT_RX_PTHRESH, 506 .hthresh = TXGBE_DEFAULT_RX_HTHRESH, 507 .wthresh = TXGBE_DEFAULT_RX_WTHRESH, 508 }, 509 .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH, 510 .rx_drop_en = 0, 511 .offloads = 0, 512 }; 513 514 dev_info->default_txconf = (struct rte_eth_txconf) { 515 .tx_thresh = { 516 .pthresh = TXGBE_DEFAULT_TX_PTHRESH, 517 .hthresh = TXGBE_DEFAULT_TX_HTHRESH, 518 .wthresh = TXGBE_DEFAULT_TX_WTHRESH, 519 }, 520 .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH, 521 .offloads = 0, 522 }; 523 524 dev_info->rx_desc_lim = rx_desc_lim; 525 dev_info->tx_desc_lim = tx_desc_lim; 526 527 return 0; 528 } 529 530 static int 531 txgbevf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) 532 { 533 return txgbe_dev_link_update_share(dev, wait_to_complete); 534 } 535 536 /* 537 * Virtual Function operations 538 */ 539 static void 540 txgbevf_intr_disable(struct rte_eth_dev *dev) 541 { 542 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 543 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 544 545 PMD_INIT_FUNC_TRACE(); 546 547 /* Clear interrupt mask to stop from interrupts being generated */ 548 wr32(hw, TXGBE_VFIMS, TXGBE_VFIMS_MASK); 549 550 txgbe_flush(hw); 551 552 /* Clear mask value. */ 553 intr->mask_misc = TXGBE_VFIMS_MASK; 554 } 555 556 static void 557 txgbevf_intr_enable(struct rte_eth_dev *dev) 558 { 559 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 560 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 561 562 PMD_INIT_FUNC_TRACE(); 563 564 /* VF enable interrupt autoclean */ 565 wr32(hw, TXGBE_VFIMC, TXGBE_VFIMC_MASK); 566 567 txgbe_flush(hw); 568 569 intr->mask_misc = 0; 570 } 571 572 static int 573 txgbevf_dev_configure(struct rte_eth_dev *dev) 574 { 575 struct rte_eth_conf *conf = &dev->data->dev_conf; 576 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev); 577 578 PMD_INIT_LOG(DEBUG, "Configured Virtual Function port id: %d", 579 dev->data->port_id); 580 581 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 582 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 583 584 /* 585 * VF has no ability to enable/disable HW CRC 586 * Keep the persistent behavior the same as Host PF 587 */ 588 #ifndef RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC 589 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC) { 590 PMD_INIT_LOG(NOTICE, "VF can't disable HW CRC Strip"); 591 conf->rxmode.offloads &= ~DEV_RX_OFFLOAD_KEEP_CRC; 592 } 593 #else 594 if (!(conf->rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) { 595 PMD_INIT_LOG(NOTICE, "VF can't enable HW CRC Strip"); 596 conf->rxmode.offloads |= DEV_RX_OFFLOAD_KEEP_CRC; 597 } 598 #endif 599 600 /* 601 * Initialize to TRUE. If any of Rx queues doesn't meet the bulk 602 * allocation or vector Rx preconditions we will reset it. 603 */ 604 adapter->rx_bulk_alloc_allowed = true; 605 606 return 0; 607 } 608 609 static int 610 txgbevf_dev_start(struct rte_eth_dev *dev) 611 { 612 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 613 uint32_t intr_vector = 0; 614 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 615 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 616 617 int err, mask = 0; 618 619 PMD_INIT_FUNC_TRACE(); 620 621 /* Stop the link setup handler before resetting the HW. */ 622 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev); 623 624 err = hw->mac.reset_hw(hw); 625 if (err) { 626 PMD_INIT_LOG(ERR, "Unable to reset vf hardware (%d)", err); 627 return err; 628 } 629 hw->mac.get_link_status = true; 630 631 /* negotiate mailbox API version to use with the PF. */ 632 txgbevf_negotiate_api(hw); 633 634 txgbevf_dev_tx_init(dev); 635 636 /* This can fail when allocating mbufs for descriptor rings */ 637 err = txgbevf_dev_rx_init(dev); 638 639 /** 640 * In this case, reuses the MAC address assigned by VF 641 * initialization. 642 */ 643 if (err != 0 && err != TXGBE_ERR_INVALID_MAC_ADDR) { 644 PMD_INIT_LOG(ERR, "Unable to initialize RX hardware (%d)", err); 645 txgbe_dev_clear_queues(dev); 646 return err; 647 } 648 649 /* Set vfta */ 650 txgbevf_set_vfta_all(dev, 1); 651 652 /* Set HW strip */ 653 mask = ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK | 654 ETH_VLAN_EXTEND_MASK; 655 err = txgbevf_vlan_offload_config(dev, mask); 656 if (err) { 657 PMD_INIT_LOG(ERR, "Unable to set VLAN offload (%d)", err); 658 txgbe_dev_clear_queues(dev); 659 return err; 660 } 661 662 txgbevf_dev_rxtx_start(dev); 663 664 /* check and configure queue intr-vector mapping */ 665 if (rte_intr_cap_multiple(intr_handle) && 666 dev->data->dev_conf.intr_conf.rxq) { 667 /* According to datasheet, only vector 0/1/2 can be used, 668 * now only one vector is used for Rx queue 669 */ 670 intr_vector = 1; 671 if (rte_intr_efd_enable(intr_handle, intr_vector)) 672 return -1; 673 } 674 675 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 676 intr_handle->intr_vec = 677 rte_zmalloc("intr_vec", 678 dev->data->nb_rx_queues * sizeof(int), 0); 679 if (intr_handle->intr_vec == NULL) { 680 PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" 681 " intr_vec", dev->data->nb_rx_queues); 682 return -ENOMEM; 683 } 684 } 685 txgbevf_configure_msix(dev); 686 687 /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt 688 * is mapped to VFIO vector 0 in eth_txgbevf_dev_init( ). 689 * If previous VFIO interrupt mapping setting in eth_txgbevf_dev_init( ) 690 * is not cleared, it will fail when following rte_intr_enable( ) tries 691 * to map Rx queue interrupt to other VFIO vectors. 692 * So clear uio/vfio intr/evevnfd first to avoid failure. 693 */ 694 rte_intr_disable(intr_handle); 695 696 rte_intr_enable(intr_handle); 697 698 /* Re-enable interrupt for VF */ 699 txgbevf_intr_enable(dev); 700 701 /* 702 * Update link status right before return, because it may 703 * start link configuration process in a separate thread. 704 */ 705 txgbevf_dev_link_update(dev, 0); 706 707 hw->adapter_stopped = false; 708 709 return 0; 710 } 711 712 static int 713 txgbevf_dev_stop(struct rte_eth_dev *dev) 714 { 715 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 716 struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev); 717 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 718 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 719 720 if (hw->adapter_stopped) 721 return 0; 722 723 PMD_INIT_FUNC_TRACE(); 724 725 rte_eal_alarm_cancel(txgbe_dev_setup_link_alarm_handler, dev); 726 727 txgbevf_intr_disable(dev); 728 729 hw->adapter_stopped = 1; 730 hw->mac.stop_hw(hw); 731 732 /* 733 * Clear what we set, but we still keep shadow_vfta to 734 * restore after device starts 735 */ 736 txgbevf_set_vfta_all(dev, 0); 737 738 /* Clear stored conf */ 739 dev->data->scattered_rx = 0; 740 741 txgbe_dev_clear_queues(dev); 742 743 /* Clean datapath event and queue/vec mapping */ 744 rte_intr_efd_disable(intr_handle); 745 if (intr_handle->intr_vec != NULL) { 746 rte_free(intr_handle->intr_vec); 747 intr_handle->intr_vec = NULL; 748 } 749 750 adapter->rss_reta_updated = 0; 751 752 return 0; 753 } 754 755 static int 756 txgbevf_dev_close(struct rte_eth_dev *dev) 757 { 758 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 759 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 760 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 761 int ret; 762 763 PMD_INIT_FUNC_TRACE(); 764 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 765 return 0; 766 767 hw->mac.reset_hw(hw); 768 769 ret = txgbevf_dev_stop(dev); 770 771 txgbe_dev_free_queues(dev); 772 773 /** 774 * Remove the VF MAC address ro ensure 775 * that the VF traffic goes to the PF 776 * after stop, close and detach of the VF 777 **/ 778 txgbevf_remove_mac_addr(dev, 0); 779 780 dev->rx_pkt_burst = NULL; 781 dev->tx_pkt_burst = NULL; 782 783 /* Disable the interrupts for VF */ 784 txgbevf_intr_disable(dev); 785 786 rte_free(dev->data->mac_addrs); 787 dev->data->mac_addrs = NULL; 788 789 rte_intr_disable(intr_handle); 790 rte_intr_callback_unregister(intr_handle, 791 txgbevf_dev_interrupt_handler, dev); 792 793 return ret; 794 } 795 796 /* 797 * Reset VF device 798 */ 799 static int 800 txgbevf_dev_reset(struct rte_eth_dev *dev) 801 { 802 int ret; 803 804 ret = eth_txgbevf_dev_uninit(dev); 805 if (ret) 806 return ret; 807 808 ret = eth_txgbevf_dev_init(dev); 809 810 return ret; 811 } 812 813 static void txgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) 814 { 815 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 816 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev); 817 int i = 0, j = 0, vfta = 0, mask = 1; 818 819 for (i = 0; i < TXGBE_VFTA_SIZE; i++) { 820 vfta = shadow_vfta->vfta[i]; 821 if (vfta) { 822 mask = 1; 823 for (j = 0; j < 32; j++) { 824 if (vfta & mask) 825 txgbe_set_vfta(hw, (i << 5) + j, 0, 826 on, false); 827 mask <<= 1; 828 } 829 } 830 } 831 } 832 833 static int 834 txgbevf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 835 { 836 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 837 struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev); 838 uint32_t vid_idx = 0; 839 uint32_t vid_bit = 0; 840 int ret = 0; 841 842 PMD_INIT_FUNC_TRACE(); 843 844 /* vind is not used in VF driver, set to 0, check txgbe_set_vfta_vf */ 845 ret = hw->mac.set_vfta(hw, vlan_id, 0, !!on, false); 846 if (ret) { 847 PMD_INIT_LOG(ERR, "Unable to set VF vlan"); 848 return ret; 849 } 850 vid_idx = (uint32_t)((vlan_id >> 5) & 0x7F); 851 vid_bit = (uint32_t)(1 << (vlan_id & 0x1F)); 852 853 /* Save what we set and restore it after device reset */ 854 if (on) 855 shadow_vfta->vfta[vid_idx] |= vid_bit; 856 else 857 shadow_vfta->vfta[vid_idx] &= ~vid_bit; 858 859 return 0; 860 } 861 862 static void 863 txgbevf_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on) 864 { 865 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 866 uint32_t ctrl; 867 868 PMD_INIT_FUNC_TRACE(); 869 870 if (queue >= hw->mac.max_rx_queues) 871 return; 872 873 ctrl = rd32(hw, TXGBE_RXCFG(queue)); 874 txgbe_dev_save_rx_queue(hw, queue); 875 if (on) 876 ctrl |= TXGBE_RXCFG_VLAN; 877 else 878 ctrl &= ~TXGBE_RXCFG_VLAN; 879 wr32(hw, TXGBE_RXCFG(queue), 0); 880 msec_delay(100); 881 txgbe_dev_store_rx_queue(hw, queue); 882 wr32m(hw, TXGBE_RXCFG(queue), 883 TXGBE_RXCFG_VLAN | TXGBE_RXCFG_ENA, ctrl); 884 885 txgbe_vlan_hw_strip_bitmap_set(dev, queue, on); 886 } 887 888 static int 889 txgbevf_vlan_offload_config(struct rte_eth_dev *dev, int mask) 890 { 891 struct txgbe_rx_queue *rxq; 892 uint16_t i; 893 int on = 0; 894 895 /* VF function only support hw strip feature, others are not support */ 896 if (mask & ETH_VLAN_STRIP_MASK) { 897 for (i = 0; i < dev->data->nb_rx_queues; i++) { 898 rxq = dev->data->rx_queues[i]; 899 on = !!(rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 900 txgbevf_vlan_strip_queue_set(dev, i, on); 901 } 902 } 903 904 return 0; 905 } 906 907 static int 908 txgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask) 909 { 910 txgbe_config_vlan_strip_on_all_queues(dev, mask); 911 912 txgbevf_vlan_offload_config(dev, mask); 913 914 return 0; 915 } 916 917 static int 918 txgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 919 { 920 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 921 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 922 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 923 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 924 uint32_t vec = TXGBE_MISC_VEC_ID; 925 926 if (rte_intr_allow_others(intr_handle)) 927 vec = TXGBE_RX_VEC_START; 928 intr->mask_misc &= ~(1 << vec); 929 RTE_SET_USED(queue_id); 930 wr32(hw, TXGBE_VFIMC, ~intr->mask_misc); 931 932 rte_intr_enable(intr_handle); 933 934 return 0; 935 } 936 937 static int 938 txgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 939 { 940 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 941 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 942 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 943 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 944 uint32_t vec = TXGBE_MISC_VEC_ID; 945 946 if (rte_intr_allow_others(intr_handle)) 947 vec = TXGBE_RX_VEC_START; 948 intr->mask_misc |= (1 << vec); 949 RTE_SET_USED(queue_id); 950 wr32(hw, TXGBE_VFIMS, intr->mask_misc); 951 952 return 0; 953 } 954 955 static void 956 txgbevf_set_ivar_map(struct txgbe_hw *hw, int8_t direction, 957 uint8_t queue, uint8_t msix_vector) 958 { 959 uint32_t tmp, idx; 960 961 if (direction == -1) { 962 /* other causes */ 963 msix_vector |= TXGBE_VFIVAR_VLD; 964 tmp = rd32(hw, TXGBE_VFIVARMISC); 965 tmp &= ~0xFF; 966 tmp |= msix_vector; 967 wr32(hw, TXGBE_VFIVARMISC, tmp); 968 } else { 969 /* rx or tx cause */ 970 /* Workround for ICR lost */ 971 idx = ((16 * (queue & 1)) + (8 * direction)); 972 tmp = rd32(hw, TXGBE_VFIVAR(queue >> 1)); 973 tmp &= ~(0xFF << idx); 974 tmp |= (msix_vector << idx); 975 wr32(hw, TXGBE_VFIVAR(queue >> 1), tmp); 976 } 977 } 978 979 static void 980 txgbevf_configure_msix(struct rte_eth_dev *dev) 981 { 982 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 983 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 984 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 985 uint32_t q_idx; 986 uint32_t vector_idx = TXGBE_MISC_VEC_ID; 987 uint32_t base = TXGBE_MISC_VEC_ID; 988 989 /* Configure VF other cause ivar */ 990 txgbevf_set_ivar_map(hw, -1, 1, vector_idx); 991 992 /* won't configure msix register if no mapping is done 993 * between intr vector and event fd. 994 */ 995 if (!rte_intr_dp_is_en(intr_handle)) 996 return; 997 998 if (rte_intr_allow_others(intr_handle)) { 999 base = TXGBE_RX_VEC_START; 1000 vector_idx = TXGBE_RX_VEC_START; 1001 } 1002 1003 /* Configure all RX queues of VF */ 1004 for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) { 1005 /* Force all queue use vector 0, 1006 * as TXGBE_VF_MAXMSIVECOTR = 1 1007 */ 1008 txgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); 1009 intr_handle->intr_vec[q_idx] = vector_idx; 1010 if (vector_idx < base + intr_handle->nb_efd - 1) 1011 vector_idx++; 1012 } 1013 1014 /* As RX queue setting above show, all queues use the vector 0. 1015 * Set only the ITR value of TXGBE_MISC_VEC_ID. 1016 */ 1017 wr32(hw, TXGBE_ITR(TXGBE_MISC_VEC_ID), 1018 TXGBE_ITR_IVAL(TXGBE_QUEUE_ITR_INTERVAL_DEFAULT) 1019 | TXGBE_ITR_WRDSA); 1020 } 1021 1022 static int 1023 txgbevf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr, 1024 __rte_unused uint32_t index, 1025 __rte_unused uint32_t pool) 1026 { 1027 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1028 int err; 1029 1030 /* 1031 * On a VF, adding again the same MAC addr is not an idempotent 1032 * operation. Trap this case to avoid exhausting the [very limited] 1033 * set of PF resources used to store VF MAC addresses. 1034 */ 1035 if (memcmp(hw->mac.perm_addr, mac_addr, 1036 sizeof(struct rte_ether_addr)) == 0) 1037 return -1; 1038 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes); 1039 if (err != 0) 1040 PMD_DRV_LOG(ERR, "Unable to add MAC address " 1041 "%02x:%02x:%02x:%02x:%02x:%02x - err=%d", 1042 mac_addr->addr_bytes[0], 1043 mac_addr->addr_bytes[1], 1044 mac_addr->addr_bytes[2], 1045 mac_addr->addr_bytes[3], 1046 mac_addr->addr_bytes[4], 1047 mac_addr->addr_bytes[5], 1048 err); 1049 return err; 1050 } 1051 1052 static void 1053 txgbevf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1054 { 1055 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1056 struct rte_ether_addr *perm_addr = 1057 (struct rte_ether_addr *)hw->mac.perm_addr; 1058 struct rte_ether_addr *mac_addr; 1059 uint32_t i; 1060 int err; 1061 1062 /* 1063 * The TXGBE_VF_SET_MACVLAN command of the txgbe-pf driver does 1064 * not support the deletion of a given MAC address. 1065 * Instead, it imposes to delete all MAC addresses, then to add again 1066 * all MAC addresses with the exception of the one to be deleted. 1067 */ 1068 (void)txgbevf_set_uc_addr_vf(hw, 0, NULL); 1069 1070 /* 1071 * Add again all MAC addresses, with the exception of the deleted one 1072 * and of the permanent MAC address. 1073 */ 1074 for (i = 0, mac_addr = dev->data->mac_addrs; 1075 i < hw->mac.num_rar_entries; i++, mac_addr++) { 1076 /* Skip the deleted MAC address */ 1077 if (i == index) 1078 continue; 1079 /* Skip NULL MAC addresses */ 1080 if (rte_is_zero_ether_addr(mac_addr)) 1081 continue; 1082 /* Skip the permanent MAC address */ 1083 if (memcmp(perm_addr, mac_addr, 1084 sizeof(struct rte_ether_addr)) == 0) 1085 continue; 1086 err = txgbevf_set_uc_addr_vf(hw, 2, mac_addr->addr_bytes); 1087 if (err != 0) 1088 PMD_DRV_LOG(ERR, 1089 "Adding again MAC address " 1090 "%02x:%02x:%02x:%02x:%02x:%02x failed " 1091 "err=%d", 1092 mac_addr->addr_bytes[0], 1093 mac_addr->addr_bytes[1], 1094 mac_addr->addr_bytes[2], 1095 mac_addr->addr_bytes[3], 1096 mac_addr->addr_bytes[4], 1097 mac_addr->addr_bytes[5], 1098 err); 1099 } 1100 } 1101 1102 static int 1103 txgbevf_set_default_mac_addr(struct rte_eth_dev *dev, 1104 struct rte_ether_addr *addr) 1105 { 1106 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1107 1108 hw->mac.set_rar(hw, 0, (void *)addr, 0, 0); 1109 1110 return 0; 1111 } 1112 1113 static int 1114 txgbevf_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu) 1115 { 1116 struct txgbe_hw *hw; 1117 uint32_t max_frame = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN; 1118 struct rte_eth_rxmode *rx_conf = &dev->data->dev_conf.rxmode; 1119 1120 hw = TXGBE_DEV_HW(dev); 1121 1122 if (mtu < RTE_ETHER_MIN_MTU || 1123 max_frame > RTE_ETHER_MAX_JUMBO_FRAME_LEN) 1124 return -EINVAL; 1125 1126 /* refuse mtu that requires the support of scattered packets when this 1127 * feature has not been enabled before. 1128 */ 1129 if (!(rx_conf->offloads & DEV_RX_OFFLOAD_SCATTER) && 1130 (max_frame + 2 * TXGBE_VLAN_TAG_SIZE > 1131 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) 1132 return -EINVAL; 1133 1134 /* 1135 * When supported by the underlying PF driver, use the TXGBE_VF_SET_MTU 1136 * request of the version 2.0 of the mailbox API. 1137 * For now, use the TXGBE_VF_SET_LPE request of the version 1.0 1138 * of the mailbox API. 1139 */ 1140 if (txgbevf_rlpml_set_vf(hw, max_frame)) 1141 return -EINVAL; 1142 1143 /* update max frame size */ 1144 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame; 1145 return 0; 1146 } 1147 1148 static int 1149 txgbevf_get_reg_length(struct rte_eth_dev *dev __rte_unused) 1150 { 1151 int count = 0; 1152 int g_ind = 0; 1153 const struct reg_info *reg_group; 1154 1155 while ((reg_group = txgbevf_regs[g_ind++])) 1156 count += txgbe_regs_group_count(reg_group); 1157 1158 return count; 1159 } 1160 1161 static int 1162 txgbevf_get_regs(struct rte_eth_dev *dev, 1163 struct rte_dev_reg_info *regs) 1164 { 1165 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1166 uint32_t *data = regs->data; 1167 int g_ind = 0; 1168 int count = 0; 1169 const struct reg_info *reg_group; 1170 1171 if (data == NULL) { 1172 regs->length = txgbevf_get_reg_length(dev); 1173 regs->width = sizeof(uint32_t); 1174 return 0; 1175 } 1176 1177 /* Support only full register dump */ 1178 if (regs->length == 0 || 1179 regs->length == (uint32_t)txgbevf_get_reg_length(dev)) { 1180 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 1181 hw->device_id; 1182 while ((reg_group = txgbevf_regs[g_ind++])) 1183 count += txgbe_read_regs_group(dev, &data[count], 1184 reg_group); 1185 return 0; 1186 } 1187 1188 return -ENOTSUP; 1189 } 1190 1191 static int 1192 txgbevf_dev_promiscuous_enable(struct rte_eth_dev *dev) 1193 { 1194 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1195 int ret; 1196 1197 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_PROMISC)) { 1198 case 0: 1199 ret = 0; 1200 break; 1201 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1202 ret = -ENOTSUP; 1203 break; 1204 default: 1205 ret = -EAGAIN; 1206 break; 1207 } 1208 1209 return ret; 1210 } 1211 1212 static int 1213 txgbevf_dev_promiscuous_disable(struct rte_eth_dev *dev) 1214 { 1215 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1216 int ret; 1217 1218 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_NONE)) { 1219 case 0: 1220 ret = 0; 1221 break; 1222 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1223 ret = -ENOTSUP; 1224 break; 1225 default: 1226 ret = -EAGAIN; 1227 break; 1228 } 1229 1230 return ret; 1231 } 1232 1233 static int 1234 txgbevf_dev_allmulticast_enable(struct rte_eth_dev *dev) 1235 { 1236 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1237 int ret; 1238 1239 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_ALLMULTI)) { 1240 case 0: 1241 ret = 0; 1242 break; 1243 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1244 ret = -ENOTSUP; 1245 break; 1246 default: 1247 ret = -EAGAIN; 1248 break; 1249 } 1250 1251 return ret; 1252 } 1253 1254 static int 1255 txgbevf_dev_allmulticast_disable(struct rte_eth_dev *dev) 1256 { 1257 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1258 int ret; 1259 1260 switch (hw->mac.update_xcast_mode(hw, TXGBEVF_XCAST_MODE_MULTI)) { 1261 case 0: 1262 ret = 0; 1263 break; 1264 case TXGBE_ERR_FEATURE_NOT_SUPPORTED: 1265 ret = -ENOTSUP; 1266 break; 1267 default: 1268 ret = -EAGAIN; 1269 break; 1270 } 1271 1272 return ret; 1273 } 1274 1275 static void txgbevf_mbx_process(struct rte_eth_dev *dev) 1276 { 1277 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1278 u32 in_msg = 0; 1279 1280 /* peek the message first */ 1281 in_msg = rd32(hw, TXGBE_VFMBX); 1282 1283 /* PF reset VF event */ 1284 if (in_msg == TXGBE_PF_CONTROL_MSG) { 1285 /* dummy mbx read to ack pf */ 1286 if (txgbe_read_mbx(hw, &in_msg, 1, 0)) 1287 return; 1288 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET, 1289 NULL); 1290 } 1291 } 1292 1293 static int 1294 txgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev) 1295 { 1296 uint32_t eicr; 1297 struct txgbe_hw *hw = TXGBE_DEV_HW(dev); 1298 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 1299 txgbevf_intr_disable(dev); 1300 1301 /* read-on-clear nic registers here */ 1302 eicr = rd32(hw, TXGBE_VFICR); 1303 intr->flags = 0; 1304 1305 /* only one misc vector supported - mailbox */ 1306 eicr &= TXGBE_VFICR_MASK; 1307 /* Workround for ICR lost */ 1308 intr->flags |= TXGBE_FLAG_MAILBOX; 1309 1310 return 0; 1311 } 1312 1313 static int 1314 txgbevf_dev_interrupt_action(struct rte_eth_dev *dev) 1315 { 1316 struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev); 1317 1318 if (intr->flags & TXGBE_FLAG_MAILBOX) { 1319 txgbevf_mbx_process(dev); 1320 intr->flags &= ~TXGBE_FLAG_MAILBOX; 1321 } 1322 1323 txgbevf_intr_enable(dev); 1324 1325 return 0; 1326 } 1327 1328 static void 1329 txgbevf_dev_interrupt_handler(void *param) 1330 { 1331 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1332 1333 txgbevf_dev_interrupt_get_status(dev); 1334 txgbevf_dev_interrupt_action(dev); 1335 } 1336 1337 /* 1338 * dev_ops for virtual function, bare necessities for basic vf 1339 * operation have been implemented 1340 */ 1341 static const struct eth_dev_ops txgbevf_eth_dev_ops = { 1342 .dev_configure = txgbevf_dev_configure, 1343 .dev_start = txgbevf_dev_start, 1344 .dev_stop = txgbevf_dev_stop, 1345 .link_update = txgbevf_dev_link_update, 1346 .stats_get = txgbevf_dev_stats_get, 1347 .xstats_get = txgbevf_dev_xstats_get, 1348 .stats_reset = txgbevf_dev_stats_reset, 1349 .xstats_reset = txgbevf_dev_stats_reset, 1350 .xstats_get_names = txgbevf_dev_xstats_get_names, 1351 .dev_close = txgbevf_dev_close, 1352 .dev_reset = txgbevf_dev_reset, 1353 .promiscuous_enable = txgbevf_dev_promiscuous_enable, 1354 .promiscuous_disable = txgbevf_dev_promiscuous_disable, 1355 .allmulticast_enable = txgbevf_dev_allmulticast_enable, 1356 .allmulticast_disable = txgbevf_dev_allmulticast_disable, 1357 .dev_infos_get = txgbevf_dev_info_get, 1358 .dev_supported_ptypes_get = txgbe_dev_supported_ptypes_get, 1359 .mtu_set = txgbevf_dev_set_mtu, 1360 .vlan_filter_set = txgbevf_vlan_filter_set, 1361 .vlan_strip_queue_set = txgbevf_vlan_strip_queue_set, 1362 .vlan_offload_set = txgbevf_vlan_offload_set, 1363 .rx_queue_setup = txgbe_dev_rx_queue_setup, 1364 .rx_queue_release = txgbe_dev_rx_queue_release, 1365 .tx_queue_setup = txgbe_dev_tx_queue_setup, 1366 .tx_queue_release = txgbe_dev_tx_queue_release, 1367 .rx_queue_intr_enable = txgbevf_dev_rx_queue_intr_enable, 1368 .rx_queue_intr_disable = txgbevf_dev_rx_queue_intr_disable, 1369 .mac_addr_add = txgbevf_add_mac_addr, 1370 .mac_addr_remove = txgbevf_remove_mac_addr, 1371 .set_mc_addr_list = txgbe_dev_set_mc_addr_list, 1372 .rxq_info_get = txgbe_rxq_info_get, 1373 .txq_info_get = txgbe_txq_info_get, 1374 .mac_addr_set = txgbevf_set_default_mac_addr, 1375 .get_reg = txgbevf_get_regs, 1376 .reta_update = txgbe_dev_rss_reta_update, 1377 .reta_query = txgbe_dev_rss_reta_query, 1378 .rss_hash_update = txgbe_dev_rss_hash_update, 1379 .rss_hash_conf_get = txgbe_dev_rss_hash_conf_get, 1380 .tx_done_cleanup = txgbe_dev_tx_done_cleanup, 1381 }; 1382 1383 RTE_PMD_REGISTER_PCI(net_txgbe_vf, rte_txgbevf_pmd); 1384 RTE_PMD_REGISTER_PCI_TABLE(net_txgbe_vf, pci_id_txgbevf_map); 1385 RTE_PMD_REGISTER_KMOD_DEP(net_txgbe_vf, "* igb_uio | vfio-pci"); 1386