xref: /dpdk/drivers/net/ngbe/base/ngbe_type.h (revision fbd5ceb0)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018-2021 Beijing WangXun Technology Co., Ltd.
3  * Copyright(c) 2010-2017 Intel Corporation
4  */
5 
6 #ifndef _NGBE_TYPE_H_
7 #define _NGBE_TYPE_H_
8 
9 #define NGBE_LINK_UP_TIME	90 /* 9.0 Seconds */
10 
11 #define NGBE_FRAME_SIZE_MAX       (9728) /* Maximum frame size, +FCS */
12 #define NGBE_FRAME_SIZE_DFT       (1522) /* Default frame size, +FCS */
13 #define NGBE_NUM_POOL             (32)
14 #define NGBE_PBRXSIZE_MAX         0x00080000 /* 512KB Packet Buffer */
15 #define NGBE_PBTXSIZE_MAX         0x00005000 /* 20KB Packet Buffer */
16 #define NGBE_TXPKT_SIZE_MAX       0xA /* Max Tx Packet size */
17 #define NGBE_MAX_QP               (8)
18 #define NGBE_MAX_UTA              128
19 
20 #define NGBE_PCI_MASTER_DISABLE_TIMEOUT	800
21 
22 
23 #define NGBE_ALIGN		128 /* as intel did */
24 #define NGBE_ISB_SIZE		16
25 
26 #include "ngbe_status.h"
27 #include "ngbe_osdep.h"
28 #include "ngbe_devids.h"
29 
30 struct ngbe_thermal_diode_data {
31 	s16 temp;
32 	s16 alarm_thresh;
33 	s16 dalarm_thresh;
34 };
35 
36 struct ngbe_thermal_sensor_data {
37 	struct ngbe_thermal_diode_data sensor[1];
38 };
39 
40 enum ngbe_eeprom_type {
41 	ngbe_eeprom_unknown = 0,
42 	ngbe_eeprom_spi,
43 	ngbe_eeprom_flash,
44 	ngbe_eeprom_none /* No NVM support */
45 };
46 
47 enum ngbe_link_type {
48 	ngbe_link_type_unknown = 0,
49 	ngbe_link_fiber,
50 	ngbe_link_copper
51 };
52 
53 enum ngbe_mac_type {
54 	ngbe_mac_unknown = 0,
55 	ngbe_mac_em,
56 	ngbe_mac_em_vf,
57 	ngbe_num_macs
58 };
59 
60 enum ngbe_phy_type {
61 	ngbe_phy_unknown = 0,
62 	ngbe_phy_none,
63 	ngbe_phy_rtl,
64 	ngbe_phy_mvl,
65 	ngbe_phy_mvl_sfi,
66 	ngbe_phy_yt8521s,
67 	ngbe_phy_yt8521s_sfi,
68 	ngbe_phy_zte,
69 	ngbe_phy_cu_mtd,
70 };
71 
72 enum ngbe_media_type {
73 	ngbe_media_type_unknown = 0,
74 	ngbe_media_type_fiber,
75 	ngbe_media_type_fiber_qsfp,
76 	ngbe_media_type_copper,
77 	ngbe_media_type_backplane,
78 	ngbe_media_type_cx4,
79 	ngbe_media_type_virtual
80 };
81 
82 /* Flow Control Settings */
83 enum ngbe_fc_mode {
84 	ngbe_fc_none = 0,
85 	ngbe_fc_rx_pause,
86 	ngbe_fc_tx_pause,
87 	ngbe_fc_full,
88 	ngbe_fc_default
89 };
90 
91 struct ngbe_hw;
92 
93 struct ngbe_addr_filter_info {
94 	u32 num_mc_addrs;
95 	u32 mta_in_use;
96 };
97 
98 /* Bus parameters */
99 struct ngbe_bus_info {
100 	void (*set_lan_id)(struct ngbe_hw *hw);
101 
102 	u16 func;
103 	u8 lan_id;
104 };
105 
106 /* Flow control parameters */
107 struct ngbe_fc_info {
108 	u32 high_water; /* Flow Ctrl High-water */
109 	u32 low_water; /* Flow Ctrl Low-water */
110 	u16 pause_time; /* Flow Control Pause timer */
111 	bool send_xon; /* Flow control send XON */
112 	bool strict_ieee; /* Strict IEEE mode */
113 	bool disable_fc_autoneg; /* Do not autonegotiate FC */
114 	bool fc_was_autonegged; /* Is current_mode the result of autonegging? */
115 	enum ngbe_fc_mode current_mode; /* FC mode in effect */
116 	enum ngbe_fc_mode requested_mode; /* FC mode requested by caller */
117 };
118 
119 /* Statistics counters collected by the MAC */
120 /* PB[] RxTx */
121 struct ngbe_pb_stats {
122 	u64 tx_pb_xon_packets;
123 	u64 rx_pb_xon_packets;
124 	u64 tx_pb_xoff_packets;
125 	u64 rx_pb_xoff_packets;
126 	u64 rx_pb_dropped;
127 	u64 rx_pb_mbuf_alloc_errors;
128 	u64 tx_pb_xon2off_packets;
129 };
130 
131 /* QP[] RxTx */
132 struct ngbe_qp_stats {
133 	u64 rx_qp_packets;
134 	u64 tx_qp_packets;
135 	u64 rx_qp_bytes;
136 	u64 tx_qp_bytes;
137 	u64 rx_qp_mc_packets;
138 };
139 
140 struct ngbe_hw_stats {
141 	/* MNG RxTx */
142 	u64 mng_bmc2host_packets;
143 	u64 mng_host2bmc_packets;
144 	/* Basix RxTx */
145 	u64 rx_drop_packets;
146 	u64 tx_drop_packets;
147 	u64 rx_dma_drop;
148 	u64 tx_secdrp_packets;
149 	u64 rx_packets;
150 	u64 tx_packets;
151 	u64 rx_bytes;
152 	u64 tx_bytes;
153 	u64 rx_total_bytes;
154 	u64 rx_total_packets;
155 	u64 tx_total_packets;
156 	u64 rx_total_missed_packets;
157 	u64 rx_broadcast_packets;
158 	u64 tx_broadcast_packets;
159 	u64 rx_multicast_packets;
160 	u64 tx_multicast_packets;
161 	u64 rx_management_packets;
162 	u64 tx_management_packets;
163 	u64 rx_management_dropped;
164 
165 	/* Basic Error */
166 	u64 rx_crc_errors;
167 	u64 rx_illegal_byte_errors;
168 	u64 rx_error_bytes;
169 	u64 rx_mac_short_packet_dropped;
170 	u64 rx_length_errors;
171 	u64 rx_undersize_errors;
172 	u64 rx_fragment_errors;
173 	u64 rx_oversize_errors;
174 	u64 rx_jabber_errors;
175 	u64 rx_l3_l4_xsum_error;
176 	u64 mac_local_errors;
177 	u64 mac_remote_errors;
178 
179 	/* MACSEC */
180 	u64 tx_macsec_pkts_untagged;
181 	u64 tx_macsec_pkts_encrypted;
182 	u64 tx_macsec_pkts_protected;
183 	u64 tx_macsec_octets_encrypted;
184 	u64 tx_macsec_octets_protected;
185 	u64 rx_macsec_pkts_untagged;
186 	u64 rx_macsec_pkts_badtag;
187 	u64 rx_macsec_pkts_nosci;
188 	u64 rx_macsec_pkts_unknownsci;
189 	u64 rx_macsec_octets_decrypted;
190 	u64 rx_macsec_octets_validated;
191 	u64 rx_macsec_sc_pkts_unchecked;
192 	u64 rx_macsec_sc_pkts_delayed;
193 	u64 rx_macsec_sc_pkts_late;
194 	u64 rx_macsec_sa_pkts_ok;
195 	u64 rx_macsec_sa_pkts_invalid;
196 	u64 rx_macsec_sa_pkts_notvalid;
197 	u64 rx_macsec_sa_pkts_unusedsa;
198 	u64 rx_macsec_sa_pkts_notusingsa;
199 
200 	/* MAC RxTx */
201 	u64 rx_size_64_packets;
202 	u64 rx_size_65_to_127_packets;
203 	u64 rx_size_128_to_255_packets;
204 	u64 rx_size_256_to_511_packets;
205 	u64 rx_size_512_to_1023_packets;
206 	u64 rx_size_1024_to_max_packets;
207 	u64 tx_size_64_packets;
208 	u64 tx_size_65_to_127_packets;
209 	u64 tx_size_128_to_255_packets;
210 	u64 tx_size_256_to_511_packets;
211 	u64 tx_size_512_to_1023_packets;
212 	u64 tx_size_1024_to_max_packets;
213 
214 	/* Flow Control */
215 	u64 tx_xon_packets;
216 	u64 rx_xon_packets;
217 	u64 tx_xoff_packets;
218 	u64 rx_xoff_packets;
219 
220 	u64 rx_up_dropped;
221 
222 	u64 rdb_pkt_cnt;
223 	u64 rdb_repli_cnt;
224 	u64 rdb_drp_cnt;
225 
226 	/* QP[] RxTx */
227 	struct {
228 		u64 rx_qp_packets;
229 		u64 tx_qp_packets;
230 		u64 rx_qp_bytes;
231 		u64 tx_qp_bytes;
232 		u64 rx_qp_mc_packets;
233 		u64 tx_qp_mc_packets;
234 		u64 rx_qp_bc_packets;
235 		u64 tx_qp_bc_packets;
236 	} qp[NGBE_MAX_QP];
237 
238 };
239 
240 /* iterator type for walking multicast address lists */
241 typedef u8* (*ngbe_mc_addr_itr) (struct ngbe_hw *hw, u8 **mc_addr_ptr,
242 				  u32 *vmdq);
243 
244 struct ngbe_rom_info {
245 	s32 (*init_params)(struct ngbe_hw *hw);
246 	s32 (*readw_buffer)(struct ngbe_hw *hw, u32 offset, u32 words,
247 			    void *data);
248 	s32 (*read32)(struct ngbe_hw *hw, u32 addr, u32 *data);
249 	s32 (*writew_buffer)(struct ngbe_hw *hw, u32 offset, u32 words,
250 			     void *data);
251 	s32 (*validate_checksum)(struct ngbe_hw *hw, u16 *checksum_val);
252 
253 	enum ngbe_eeprom_type type;
254 	u32 semaphore_delay;
255 	u16 word_size;
256 	u16 address_bits;
257 	u16 word_page_size;
258 	u32 sw_addr;
259 	u32 saved_version;
260 	u16 cksum_devcap;
261 };
262 
263 struct ngbe_mac_info {
264 	s32 (*init_hw)(struct ngbe_hw *hw);
265 	s32 (*reset_hw)(struct ngbe_hw *hw);
266 	s32 (*start_hw)(struct ngbe_hw *hw);
267 	s32 (*stop_hw)(struct ngbe_hw *hw);
268 	s32 (*clear_hw_cntrs)(struct ngbe_hw *hw);
269 	s32 (*get_mac_addr)(struct ngbe_hw *hw, u8 *mac_addr);
270 	s32 (*enable_rx_dma)(struct ngbe_hw *hw, u32 regval);
271 	s32 (*disable_sec_rx_path)(struct ngbe_hw *hw);
272 	s32 (*enable_sec_rx_path)(struct ngbe_hw *hw);
273 	s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
274 	void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
275 
276 	/* Link */
277 	s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
278 			       bool autoneg_wait_to_complete);
279 	s32 (*check_link)(struct ngbe_hw *hw, u32 *speed,
280 			       bool *link_up, bool link_up_wait_to_complete);
281 	s32 (*get_link_capabilities)(struct ngbe_hw *hw,
282 				      u32 *speed, bool *autoneg);
283 
284 	/* Packet Buffer manipulation */
285 	void (*setup_pba)(struct ngbe_hw *hw);
286 
287 	/* LED */
288 	s32 (*led_on)(struct ngbe_hw *hw, u32 index);
289 	s32 (*led_off)(struct ngbe_hw *hw, u32 index);
290 
291 	/* RAR */
292 	s32 (*set_rar)(struct ngbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
293 			  u32 enable_addr);
294 	s32 (*clear_rar)(struct ngbe_hw *hw, u32 index);
295 	s32 (*set_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
296 	s32 (*clear_vmdq)(struct ngbe_hw *hw, u32 rar, u32 vmdq);
297 	s32 (*init_rx_addrs)(struct ngbe_hw *hw);
298 	s32 (*update_mc_addr_list)(struct ngbe_hw *hw, u8 *mc_addr_list,
299 				      u32 mc_addr_count,
300 				      ngbe_mc_addr_itr func, bool clear);
301 	s32 (*clear_vfta)(struct ngbe_hw *hw);
302 	s32 (*set_vfta)(struct ngbe_hw *hw, u32 vlan,
303 			 u32 vind, bool vlan_on, bool vlvf_bypass);
304 	s32 (*set_vlvf)(struct ngbe_hw *hw, u32 vlan, u32 vind,
305 			   bool vlan_on, u32 *vfta_delta, u32 vfta,
306 			   bool vlvf_bypass);
307 	void (*set_mac_anti_spoofing)(struct ngbe_hw *hw, bool enable, int vf);
308 	void (*set_vlan_anti_spoofing)(struct ngbe_hw *hw,
309 					bool enable, int vf);
310 
311 	/* Flow Control */
312 	s32 (*fc_enable)(struct ngbe_hw *hw);
313 	s32 (*setup_fc)(struct ngbe_hw *hw);
314 	void (*fc_autoneg)(struct ngbe_hw *hw);
315 
316 	/* Manageability interface */
317 	s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
318 	s32 (*check_overtemp)(struct ngbe_hw *hw);
319 
320 	enum ngbe_mac_type type;
321 	enum ngbe_link_type link_type;
322 	u8 addr[ETH_ADDR_LEN];
323 	u8 perm_addr[ETH_ADDR_LEN];
324 #define NGBE_MAX_MTA			128
325 	u32 mta_shadow[NGBE_MAX_MTA];
326 	s32 mc_filter_type;
327 	u32 mcft_size;
328 	u32 vft_size;
329 	u32 num_rar_entries;
330 	u32 rx_pb_size;
331 	u32 max_tx_queues;
332 	u32 max_rx_queues;
333 	bool get_link_status;
334 	struct ngbe_thermal_sensor_data  thermal_sensor_data;
335 	bool set_lben;
336 	u32  max_link_up_time;
337 
338 	u32 default_speeds;
339 	bool autoneg;
340 };
341 
342 struct ngbe_phy_info {
343 	s32 (*identify)(struct ngbe_hw *hw);
344 	s32 (*init_hw)(struct ngbe_hw *hw);
345 	s32 (*reset_hw)(struct ngbe_hw *hw);
346 	s32 (*read_reg)(struct ngbe_hw *hw, u32 reg_addr,
347 				u32 device_type, u16 *phy_data);
348 	s32 (*write_reg)(struct ngbe_hw *hw, u32 reg_addr,
349 				u32 device_type, u16 phy_data);
350 	s32 (*read_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
351 				u32 device_type, u16 *phy_data);
352 	s32 (*write_reg_unlocked)(struct ngbe_hw *hw, u32 reg_addr,
353 				u32 device_type, u16 phy_data);
354 	s32 (*setup_link)(struct ngbe_hw *hw, u32 speed,
355 				bool autoneg_wait_to_complete);
356 	s32 (*check_link)(struct ngbe_hw *hw, u32 *speed, bool *link_up);
357 	s32 (*set_phy_power)(struct ngbe_hw *hw, bool on);
358 	s32 (*led_oem_chk)(struct ngbe_hw *hw, u32 *data);
359 	s32 (*get_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit);
360 	s32 (*get_lp_adv_pause)(struct ngbe_hw *hw, u8 *pause_bit);
361 	s32 (*set_pause_adv)(struct ngbe_hw *hw, u16 pause_bit);
362 
363 	enum ngbe_media_type media_type;
364 	enum ngbe_phy_type type;
365 	u32 addr;
366 	u32 id;
367 	u32 revision;
368 	u32 phy_semaphore_mask;
369 	bool reset_disable;
370 	u32 autoneg_advertised;
371 };
372 
373 struct ngbe_mbx_stats {
374 	u32 msgs_tx;
375 	u32 msgs_rx;
376 
377 	u32 acks;
378 	u32 reqs;
379 	u32 rsts;
380 };
381 
382 struct ngbe_mbx_info {
383 	void (*init_params)(struct ngbe_hw *hw);
384 	s32  (*read)(struct ngbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
385 	s32  (*write)(struct ngbe_hw *hw, u32 *msg, u16 size, u16 vf_number);
386 	s32  (*check_for_msg)(struct ngbe_hw *hw, u16 mbx_id);
387 	s32  (*check_for_ack)(struct ngbe_hw *hw, u16 mbx_id);
388 	s32  (*check_for_rst)(struct ngbe_hw *hw, u16 mbx_id);
389 
390 	struct ngbe_mbx_stats stats;
391 	u32 timeout;
392 	u32 usec_delay;
393 	u16 size;
394 };
395 
396 enum ngbe_isb_idx {
397 	NGBE_ISB_HEADER,
398 	NGBE_ISB_MISC,
399 	NGBE_ISB_VEC0,
400 	NGBE_ISB_VEC1,
401 	NGBE_ISB_MAX
402 };
403 
404 struct ngbe_hw {
405 	void IOMEM *hw_addr;
406 	void *back;
407 	struct ngbe_mac_info mac;
408 	struct ngbe_addr_filter_info addr_ctrl;
409 	struct ngbe_fc_info fc;
410 	struct ngbe_phy_info phy;
411 	struct ngbe_rom_info rom;
412 	struct ngbe_bus_info bus;
413 	struct ngbe_mbx_info mbx;
414 	u16 device_id;
415 	u16 vendor_id;
416 	u16 sub_device_id;
417 	u16 sub_system_id;
418 	u32 eeprom_id;
419 	u8 revision_id;
420 	bool adapter_stopped;
421 
422 	uint64_t isb_dma;
423 	void IOMEM *isb_mem;
424 	u16 nb_rx_queues;
425 	u16 nb_tx_queues;
426 
427 	u32 mode;
428 
429 	u32 q_rx_regs[8 * 4];
430 	u32 q_tx_regs[8 * 4];
431 	bool offset_loaded;
432 	bool is_pf;
433 	bool gpio_ctl;
434 	u32 led_conf;
435 	struct {
436 		u64 rx_qp_packets;
437 		u64 tx_qp_packets;
438 		u64 rx_qp_bytes;
439 		u64 tx_qp_bytes;
440 		u64 rx_qp_mc_packets;
441 		u64 tx_qp_mc_packets;
442 		u64 rx_qp_bc_packets;
443 		u64 tx_qp_bc_packets;
444 	} qp_last[NGBE_MAX_QP];
445 };
446 
447 #include "ngbe_regs.h"
448 #include "ngbe_dummy.h"
449 
450 #endif /* _NGBE_TYPE_H_ */
451