1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2018 Atomic Rules LLC
3 */
4
5 #include <unistd.h>
6
7 #include "ark_logs.h"
8 #include "ark_mpu.h"
9
10 uint16_t
ark_api_num_queues(struct ark_mpu_t * mpu)11 ark_api_num_queues(struct ark_mpu_t *mpu)
12 {
13 return mpu->hw.num_queues;
14 }
15
16 uint16_t
ark_api_num_queues_per_port(struct ark_mpu_t * mpu,uint16_t ark_ports)17 ark_api_num_queues_per_port(struct ark_mpu_t *mpu, uint16_t ark_ports)
18 {
19 return mpu->hw.num_queues / ark_ports;
20 }
21
22 int
ark_mpu_verify(struct ark_mpu_t * mpu,uint32_t obj_size)23 ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size)
24 {
25 uint32_t version;
26
27 version = mpu->id.vernum & 0x0000fF00;
28 if ((mpu->id.idnum != 0x2055504d) ||
29 (mpu->hw.obj_size != obj_size) ||
30 (version != 0x00003100)) {
31 ARK_PMD_LOG(ERR,
32 " MPU module not found as expected %08x"
33 " \"%c%c%c%c %c%c%c%c\"\n",
34 mpu->id.idnum,
35 mpu->id.id[0], mpu->id.id[1],
36 mpu->id.id[2], mpu->id.id[3],
37 mpu->id.ver[0], mpu->id.ver[1],
38 mpu->id.ver[2], mpu->id.ver[3]);
39 ARK_PMD_LOG(ERR,
40 " MPU HW num_queues: %u hw_depth %u,"
41 " obj_size: %u, obj_per_mrr: %u"
42 " Expected size %u\n",
43 mpu->hw.num_queues,
44 mpu->hw.hw_depth,
45 mpu->hw.obj_size,
46 mpu->hw.obj_per_mrr,
47 obj_size);
48 return -1;
49 }
50 return 0;
51 }
52
53 void
ark_mpu_stop(struct ark_mpu_t * mpu)54 ark_mpu_stop(struct ark_mpu_t *mpu)
55 {
56 mpu->cfg.command = MPU_CMD_STOP;
57 }
58
59 void
ark_mpu_start(struct ark_mpu_t * mpu)60 ark_mpu_start(struct ark_mpu_t *mpu)
61 {
62 mpu->cfg.command = MPU_CMD_RUN;
63 }
64
65 int
ark_mpu_reset(struct ark_mpu_t * mpu)66 ark_mpu_reset(struct ark_mpu_t *mpu)
67 {
68 int cnt = 0;
69
70 mpu->cfg.command = MPU_CMD_RESET;
71 rte_wmb();
72
73 while (mpu->cfg.command != MPU_CMD_IDLE) {
74 if (cnt++ > 1000)
75 break;
76 usleep(10);
77 }
78 if (mpu->cfg.command != MPU_CMD_IDLE) {
79 mpu->cfg.command = MPU_CMD_FORCE_RESET;
80 usleep(10);
81 }
82 ark_mpu_reset_stats(mpu);
83 return mpu->cfg.command != MPU_CMD_IDLE;
84 }
85
86 void
ark_mpu_reset_stats(struct ark_mpu_t * mpu)87 ark_mpu_reset_stats(struct ark_mpu_t *mpu)
88 {
89 mpu->stats.pci_request = 1; /* reset stats */
90 }
91
92 int
ark_mpu_configure(struct ark_mpu_t * mpu,rte_iova_t ring,uint32_t ring_size,int is_tx)93 ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring, uint32_t ring_size,
94 int is_tx)
95 {
96 ark_mpu_reset(mpu);
97
98 if (!rte_is_power_of_2(ring_size)) {
99 ARK_PMD_LOG(ERR, "Invalid ring size for MPU %d\n",
100 ring_size);
101 return -1;
102 }
103
104 mpu->cfg.ring_base = ring;
105 mpu->cfg.ring_size = ring_size;
106 mpu->cfg.ring_mask = ring_size - 1;
107 mpu->cfg.min_host_move = is_tx ? 1 : mpu->hw.obj_per_mrr;
108 mpu->cfg.min_hw_move = mpu->hw.obj_per_mrr;
109 mpu->cfg.sw_prod_index = 0;
110 mpu->cfg.hw_cons_index = 0;
111 return 0;
112 }
113
114 void
ark_mpu_dump(struct ark_mpu_t * mpu,const char * code,uint16_t qid)115 ark_mpu_dump(struct ark_mpu_t *mpu, const char *code, uint16_t qid)
116 {
117 /* DUMP to see that we have started */
118 ARK_PMD_LOG(DEBUG, "MPU: %s Q: %3u sw_prod %u, hw_cons: %u\n",
119 code, qid,
120 mpu->cfg.sw_prod_index, mpu->cfg.hw_cons_index);
121 ARK_PMD_LOG(DEBUG, "MPU: %s state: %d count %d, reserved %d"
122 "\n",
123 code,
124 mpu->debug.state, mpu->debug.count,
125 mpu->debug.reserved
126 );
127 }
128
129 void
ark_mpu_dump_setup(struct ark_mpu_t * mpu,uint16_t q_id)130 ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t q_id)
131 {
132 ARK_PMD_LOG(DEBUG, "MPU Setup Q: %u"
133 ARK_SU64X "\n",
134 q_id,
135 "ring_base", mpu->cfg.ring_base
136 );
137 }
138