Home
last modified time | relevance | path

Searched refs:isVGPRClass (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h199 static bool isVGPRClass(const TargetRegisterClass *RC) { in isVGPRClass() function
H A DSIRegisterInfo.cpp442 if (ST.hasMAIInsts() && (isVGPRClass(RC) || isAGPRClass(RC))) { in getLargestLegalSuperClass()
2716 } else if (isVGPRClass(RC)) { in getSubRegClass()
2821 return RC && isVGPRClass(RC); in isVGPR()
3037 if (isVGPRClass(&RC)) in isProperlyAlignedRC()
3057 if (isVGPRClass(RC)) in getProperlyAlignedRC()
H A DGCNSchedStrategy.cpp891 if (!SRI->isVGPRClass(DAG.MRI.getRegClass(Reg)) || in collectRematerializableInstructions()
H A DSIInstrInfo.cpp7248 if (RI.isVGPRClass(NewDstRC) || NewDstRC == &AMDGPU::VReg_1RegClass) in getDestEquivalentVGPRClass()
H A DSIISelLowering.cpp12168 if (SIRegisterInfo::isVGPRClass(RC)) in getRegForInlineAsmConstraint()