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Searched refs:hasStdExtZbb (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCV.td141 def HasStdExtZbb : Predicate<"Subtarget->hasStdExtZbb()">,
204 : Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbp()">,
236 : Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbkb()">,
242 …: Predicate<"Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbp() || Subtarget->hasStdExtZbkb()"…
H A DRISCVTargetTransformInfo.cpp65 if (Imm == UINT64_C(0xffff) && ST->hasStdExtZbb()) in getIntImmCostInst()
117 return ST->hasStdExtZbb() ? TTI::PSK_FastHardware : TTI::PSK_Software; in getPopcntSupport()
H A DRISCVSubtarget.h159 bool hasStdExtZbb() const { return HasStdExtZbb; } in hasStdExtZbb() function
H A DRISCVISelLowering.cpp200 if (!Subtarget.hasStdExtZbb()) in RISCVTargetLowering()
245 if (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbp() || in RISCVTargetLowering()
277 if (Subtarget.hasStdExtZbb()) { in RISCVTargetLowering()
952 if (Subtarget.hasStdExtZbb()) in RISCVTargetLowering()
957 if (Subtarget.hasStdExtZfh() || Subtarget.hasStdExtZbb()) in RISCVTargetLowering()
1135 return Subtarget.hasStdExtZbb(); in isCheapToSpeculateCttz()
1139 return Subtarget.hasStdExtZbb(); in isCheapToSpeculateCtlz()
1149 return (Subtarget.hasStdExtZbb() || Subtarget.hasStdExtZbp() || in hasAndNotCompare()
7067 if (Subtarget.hasStdExtZbb()) { in ReplaceNodeResults()
8246 if (Subtarget.hasStdExtZbb() && Subtarget.is64Bit() && in performSIGN_EXTEND_INREGCombine()
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H A DRISCVISelDAGToDAG.cpp958 (Subtarget->hasStdExtZbb() || Subtarget->hasStdExtZbp())) || in Select()