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Searched refs:getMachineOpValue (Results 1 – 25 of 25) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp48 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
103 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
127 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
160 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
220 unsigned RegBits = getMachineOpValue(MI, RegMO, Fixups, STI) << 6; in getMemRIHashEncoding()
241 getMachineOpValue(MI, MI.getOperand(OpNo + 1), Fixups, STI) << 34; in getMemRI34PCRelEncoding()
339 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 3; in getSPE8DisEncoding()
354 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 2; in getSPE4DisEncoding()
369 uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 1; in getSPE2DisEncoding()
377 if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups, STI); in getTLSRegEncoding()
[all …]
H A DPPCMCCodeEmitter.h105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp62 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
207 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
227 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
238 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
250 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDLAddr12Len4Encoding()
261 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDLAddr12Len8Encoding()
272 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDRAddr12Encoding()
274 uint64_t Len = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDRAddr12Encoding()
[all …]
/llvm-project-15.0.7/llvm/test/TableGen/
H A DVarLenEncoder.td70 // CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
73 // CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
76 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/32, Scratch, Fixups, STI);
79 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/36, Scratch, Fixups, STI);
88 // CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
91 // CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
94 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/48, Scratch, Fixups, STI);
97 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/52, Scratch, Fixups, STI);
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.cpp537 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
732 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
773 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
775 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
787 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
789 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
801 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
803 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
818 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMSPImm5Lsl2()
833 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMGPImm7Lsl2()
[all …]
H A DMipsMCCodeEmitter.h180 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/llvm-project-15.0.7/llvm/lib/Target/VE/MCTargetDesc/
H A DVEMCCodeEmitter.cpp63 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
89 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
121 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
134 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
144 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
112 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
121 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
210 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
223 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
236 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/MCTargetDesc/
H A DLoongArchMCCodeEmitter.cpp51 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
75 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in LoongArchMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCCodeEmitter.cpp53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
78 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DR600MCCodeEmitter.cpp47 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
156 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
H A DSIMCCodeEmitter.cpp53 void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
360 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
423 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
535 void SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
H A DAMDGPUMCCodeEmitter.h41 virtual void getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/llvm-project-15.0.7/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCCodeEmitter.cpp53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kMCCodeEmitter.cpp47 void getMachineOpValue(const MCInst &MI, const MCOperand &Op,
193 void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op, in getMachineOpValue() function in M68kMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCodeEmitter.h68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
H A DHexagonMCCodeEmitter.cpp710 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRMCCodeEmitter.h94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
H A DAVRMCCodeEmitter.cpp254 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp72 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
226 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/CSKY/MCTargetDesc/
H A DCSKYMCCodeEmitter.h45 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
H A DCSKYMCCodeEmitter.cpp245 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp61 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
201 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp86 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
552 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter