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Searched refs:ZeroExtend (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/lld/MachO/Arch/
H A DARM64.cpp160 enum ExtendType { ZeroExtend = 1, Sign64 = 2, Sign32 = 3 }; enumerator
227 ldr.extendType = ZeroExtend; in parseLdr()
236 ldr.extendType = ZeroExtend; in parseLdr()
306 assert(ldr.extendType == ZeroExtend); in writeImmediateLdr()
/llvm-project-15.0.7/flang/lib/Evaluate/
H A Dfold-logical.cpp16 static std::optional<Expr<SomeType>> ZeroExtend(const Constant<T> &c) { in ZeroExtend() function
89 constArgs[i] = ZeroExtend(*c); in FoldIntrinsicFunction()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVImageOps.td50 | `"VolatileTexel"` | `"SignExtend"` | `"ZeroExtend"`
H A DSPIRVBase.td3437 def SPV_IO_ZeroExtend : I32BitEnumAttrCaseBit<"ZeroExtend", 13> {
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVBaseInfo.h409 ZeroExtend = 0x2000, enumerator
H A DSPIRVBaseInfo.cpp523 if (e == static_cast<uint32_t>(ImageOperand::ZeroExtend)) in getImageOperandName()
525 if (e & static_cast<uint32_t>(ImageOperand::ZeroExtend)) { in getImageOperandName()
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp480 _PC = ZeroExtend(target); in BranchTo()
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp6694 R[t] = ZeroExtend(MemU[address,1], 32); in EmulateLDRBImmediate()
6841 R[t] = ZeroExtend(MemU[address,1], 32); in EmulateLDRBLiteral()
6923 R[t] = ZeroExtend(MemU[address,1],32); in EmulateLDRBRegister()
7087 R[t] = ZeroExtend(data, 32); in EmulateLDRHImmediate()
7233 R[t] = ZeroExtend(data, 32); in EmulateLDRHLiteral()
7339 R[t] = ZeroExtend(data, 32); in EmulateLDRHRegister()
8517 R[d] = ZeroExtend(rotated<7:0>, 32); in EmulateUXTB()
8600 R[d] = ZeroExtend(rotated<15:0>, 32); in EmulateUXTH()
/llvm-project-15.0.7/mlir/lib/Dialect/SPIRV/IR/
H A DSPIRVOps.cpp411 spirv::ImageOperands::SignExtend | spirv::ImageOperands::ZeroExtend; in verifyImageOperands()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp43722 auto WidenToV16I8 = [&](SDValue V, bool ZeroExtend) { in combineArithReduction() argument
43724 if (ZeroExtend && Subtarget.hasSSE41()) { in combineArithReduction()
43732 ZeroExtend ? DAG.getConstant(0, DL, MVT::v4i8) in combineArithReduction()