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Searched refs:SubDef (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp496 for (MachineInstr *SubDef = MRI.getVRegDef(Sub->getReg()); in getRegSeqInit() local
497 SubDef && Sub->isReg() && Sub->getReg().isVirtual() && in getRegSeqInit()
498 !Sub->getSubReg() && TII->isFoldableCopy(*SubDef); in getRegSeqInit()
499 SubDef = MRI.getVRegDef(Sub->getReg())) { in getRegSeqInit()
500 MachineOperand *Op = &SubDef->getOperand(1); in getRegSeqInit()
1533 const MachineInstr *SubDef = MRI->getVRegDef(Op->getReg()); in tryFoldRegSequence() local
1534 if (!SubDef || !SubDef->isCopy() || SubDef->getOperand(1).getSubReg()) in tryFoldRegSequence()
1536 if (!TRI->isAGPR(*MRI, SubDef->getOperand(1).getReg())) in tryFoldRegSequence()
1571 MachineInstr *SubDef = MRI->getVRegDef(Def->getReg()); in tryFoldRegSequence() local
1572 SubDef->getOperand(1).setIsKill(false); in tryFoldRegSequence()
[all …]
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dcast-multiclass.td16 def SubDef;
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp980 for (Record *SubDef = PRDef; in ExpandProcResources() local
981 SubDef->getValueInit("Super")->isComplete();) { in ExpandProcResources()
982 if (SubDef->isSubClassOf("ProcResGroup")) { in ExpandProcResources()
984 PrintFatalError(SubDef->getLoc(), "Processor resource group " in ExpandProcResources()
988 SchedModels.findProcResUnits(SubDef->getValueAsDef("Super"), PM, in ExpandProcResources()
989 SubDef->getLoc()); in ExpandProcResources()
992 SubDef = SuperDef; in ExpandProcResources()