| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | fmf-propagation.ll | 19 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract1:' 42 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract2:' 131 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast1:' 154 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast2:' 236 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast1:' 265 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast2:' 294 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_afn_ieee:' 432 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_fast_ieee:' 542 ; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:' 546 ; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:' [all …]
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| H A D | add_cmp.ll | 12 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsigned:entry' 25 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSigned:entry' 38 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiUnsignedOverflow:entry' 51 ; CHECK: Optimized lowered selection DAG: %bb.0 'addiCmpiSignedOverflow:entry'
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | combine_loads_from_build_pair.ll | 6 ; between "Initial selection DAG" and "Optimized lowered selection DAG". 18 ; CHECK-LABEL: Optimized lowered selection DAG:
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetPassConfig.h | 384 virtual FunctionPass *createTargetRegisterAllocator(bool Optimized); 462 virtual FunctionPass *createRegAllocPass(bool Optimized);
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| H A D | CodeGenPassBuilder.h | 444 void addTargetRegisterAllocator(AddMachinePass &, bool Optimized) const; 448 void addRegAllocPass(AddMachinePass &, bool Optimized) const; 1000 AddMachinePass &addPass, bool Optimized) const { in addTargetRegisterAllocator() argument 1001 if (Optimized) in addTargetRegisterAllocator() 1012 bool Optimized) const { in addRegAllocPass() argument 1015 derived().addTargetRegisterAllocator(addPass, Optimized); in addRegAllocPass()
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| /llvm-project-15.0.7/compiler-rt/test/builtins/Unit/ppc/ |
| H A D | test | 2 if gcc -arch ppc -O0 $FILE ../../../Release/ppc/libcompiler_rt.Optimized.a -mlong-double-128
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetMachine.cpp | 951 FunctionPass *createSGPRAllocPass(bool Optimized); 952 FunctionPass *createVGPRAllocPass(bool Optimized); 953 FunctionPass *createRegAllocPass(bool Optimized) override; 1326 FunctionPass *GCNPassConfig::createSGPRAllocPass(bool Optimized) { in createSGPRAllocPass() argument 1335 if (Optimized) in createSGPRAllocPass() 1341 FunctionPass *GCNPassConfig::createVGPRAllocPass(bool Optimized) { in createVGPRAllocPass() argument 1350 if (Optimized) in createVGPRAllocPass() 1356 FunctionPass *GCNPassConfig::createRegAllocPass(bool Optimized) { in createRegAllocPass() argument
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | fmf-propagation.ll | 17 ; CHECK: Optimized lowered selection DAG: %bb.0 'fmf_transfer:' 31 ; CHECK-LABEL: Optimized type-legalized selection DAG: %bb.0 'fmf_setcc:'
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| H A D | merge-store-partially-alias-loads.ll | 16 ; DBGDAG-LABEL: Optimized legalized selection DAG: %bb.0 'merge_store_partial_overlap_load:'
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| /llvm-project-15.0.7/bolt/test/X86/ |
| H A D | remove-unused.test | 12 # Optimized
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| /llvm-project-15.0.7/llvm/docs/GlobalISel/ |
| H A D | Resources.rst | 11 * `Generating Optimized Code with GlobalISel by Volkan Keles, Daniel Sanders @LLVMDevMeeting 2019 <…
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| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | cmpb-dec-imm.ll | 5 ; The "Optimized Lowered Selection" converts the "ugt with #40" to
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| H A D | clr_set_toggle.ll | 2 ; Optimized bitwise operations.
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| /llvm-project-15.0.7/llvm/bindings/go/llvm/ |
| H A D | dibuilder.go | 117 Optimized bool member 143 C.LLVMBool(boolToCInt(cu.Optimized)), 205 Optimized bool member 226 C.LLVMBool(boolToCInt(f.Optimized)),
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | DebugInfoFlags.def | 85 HANDLE_DISP_FLAG((1u << 4), Optimized)
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetPassConfig.cpp | 1379 FunctionPass *TargetPassConfig::createTargetRegisterAllocator(bool Optimized) { in createTargetRegisterAllocator() argument 1380 if (Optimized) in createTargetRegisterAllocator() 1395 FunctionPass *TargetPassConfig::createRegAllocPass(bool Optimized) { in createRegAllocPass() argument 1405 return createTargetRegisterAllocator(Optimized); in createRegAllocPass()
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| /llvm-project-15.0.7/llvm/test/Transforms/InferAddressSpaces/AMDGPU/ |
| H A D | basic.ll | 85 ; Optimized to group load/store. 98 ; Optimized to private load/store.
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| /llvm-project-15.0.7/llvm/tools/bugpoint/ |
| H A D | Miscompilation.cpp | 706 std::unique_ptr<Module> Optimized = in TestOptimizer() local 708 if (!Optimized) { in TestOptimizer() 721 auto Result = testMergedProgram(BD, *Optimized, *Safe, Broken); in TestOptimizer()
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| /llvm-project-15.0.7/llvm/test/DebugInfo/X86/ |
| H A D | dbg-declare-inalloca.ll | 45 ; FIXME: Optimized debug info should preserve this.
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | MemorySSA.h | 306 MemoryAccess *DMA, bool Optimized = false, 308 if (!Optimized) {
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1101 bool Optimized = false; in emitSelect() local 1103 &Optimized](Register &Reg, Register &OtherReg, in emitSelect() 1105 if (Optimized) in emitSelect() 1170 &Optimized]() { in emitSelect() 1171 if (Optimized) in emitSelect() 1240 Optimized |= TryFoldBinOpIntoSelect(False, True, /*Invert = */ false); in emitSelect() 1241 Optimized |= TryFoldBinOpIntoSelect(True, False, /*Invert = */ true); in emitSelect() 1242 Optimized |= TryOptSelectCst(); in emitSelect()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 1028 bool Optimized = false; member in __anoncee47b830111::PredicateListMatcher 1048 Optimized = true; in predicates_pop_front() 1062 Optimized = true; in eraseNullPredicates() 1069 if (Predicates.empty() && !Optimized) { in emitPredicateListOpcodes() 1089 if (Predicates.empty() && !Optimized) { in emitFilteredPredicateListOpcodes() 1669 if (!Optimized) { in emitPredicateOpcodes()
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| /llvm-project-15.0.7/llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/ |
| H A D | split-gep.ll | 101 ; Optimized GEPs for multidimensional array with same base
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| /llvm-project-15.0.7/bolt/docs/ |
| H A D | OptimizingClang.md | 167 using the `merge-fdata` utility that comes with BOLT. Optimized with that profile, the *PGO+LTO+BOL…
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| /llvm-project-15.0.7/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/ |
| H A D | test-sparse-dot-product.mlir | 173 // Optimized vector dot product implementation: Taking advantage of the fact
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