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Searched refs:IsZeroExt (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp77 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad() local
83 if (IsZeroExt) in SelectIndexedLoad()
89 if (IsZeroExt) in SelectIndexedLoad()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp8397 bool IsZeroExt = Op0.getOpcode() == RISCVISD::VZEXT_VL; in combineMUL_VLToVWMUL_VL() local
8399 if ((!IsSignExt && !IsZeroExt) || !Op0.hasOneUse()) in combineMUL_VLToVWMUL_VL()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13932 auto IsZeroExt = [&](SDValue Op) { in PerformMVEVMULLCombine() local
13969 if (SDValue Op0 = IsZeroExt(N0)) { in PerformMVEVMULLCombine()
13970 if (SDValue Op1 = IsZeroExt(N1)) { in PerformMVEVMULLCombine()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp9163 bool IsZeroExt = LeftOp.getOpcode() == ISD::ZERO_EXTEND; in combineShiftToMULH() local
9165 if (!IsSignExt && !IsZeroExt) in combineShiftToMULH()