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/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dcmov.ll24 ; 32-CMP-DAG: lw $2, 0($[[T2]])
39 ; 64-CMP-DAG: ld $2, 0($[[T2]])
64 ; 32-CMP-DAG: lw $2, 0($[[T2]])
719 ; 32-CMP-NOT: seleqz
720 ; 32-CMP-NOT: selnez
728 ; 64-CMP-NOT: seleqz
729 ; 64-CMP-NOT: selnez
745 ; 32-CMP-NOT: seleqz
746 ; 32-CMP-NOT: selnez
754 ; 64-CMP-NOT: seleqz
[all …]
H A Dfcmp.ll24 ; 32-CMP: addiu $2, $zero, 0
28 ; 64-CMP: addiu $2, $zero, 0
50 ; 32-CMP-DAG: andi $2, $[[T1]], 1
54 ; 64-CMP-DAG: andi $2, $[[T1]], 1
83 ; 32-CMP-DAG: andi $2, $[[T1]], 1
87 ; 64-CMP-DAG: andi $2, $[[T1]], 1
116 ; 32-CMP-DAG: andi $2, $[[T1]], 1
120 ; 64-CMP-DAG: andi $2, $[[T1]], 1
149 ; 32-CMP-DAG: andi $2, $[[T1]], 1
153 ; 64-CMP-DAG: andi $2, $[[T1]], 1
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dicmp-shl-nsw.ll10 ; CHECK-NEXT: ret i1 [[CMP]]
20 ; CHECK-NEXT: ret i1 [[CMP]]
30 ; CHECK-NEXT: ret i1 [[CMP]]
52 ; CHECK-NEXT: ret i1 [[CMP]]
77 ; CHECK-NEXT: ret i1 [[CMP]]
87 ; CHECK-NEXT: ret i1 [[CMP]]
97 ; CHECK-NEXT: ret i1 [[CMP]]
107 ; CHECK-NEXT: ret i1 [[CMP]]
120 ; CHECK-NEXT: ret i1 [[CMP]]
130 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcast-int-icmp-eq-0.ll15 ; CHECK-NEXT: ret i1 [[CMP]]
26 ; CHECK-NEXT: ret i1 [[CMP]]
37 ; CHECK-NEXT: ret i1 [[CMP]]
48 ; CHECK-NEXT: ret i1 [[CMP]]
59 ; CHECK-NEXT: ret i1 [[CMP]]
70 ; CHECK-NEXT: ret i1 [[CMP]]
81 ; CHECK-NEXT: ret i1 [[CMP]]
92 ; CHECK-NEXT: ret i1 [[CMP]]
103 ; CHECK-NEXT: ret i1 [[CMP]]
114 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcmp-x-vs-neg-x.ll10 ; CHECK-NEXT: ret i1 [[CMP]]
21 ; CHECK-NEXT: ret i1 [[CMP]]
34 ; CHECK-NEXT: ret i1 [[CMP]]
45 ; CHECK-NEXT: ret i1 [[CMP]]
55 ; CHECK-NEXT: ret i1 [[CMP]]
65 ; CHECK-NEXT: ret i1 [[CMP]]
75 ; CHECK-NEXT: ret i1 [[CMP]]
85 ; CHECK-NEXT: ret i1 [[CMP]]
95 ; CHECK-NEXT: ret i1 [[CMP]]
105 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcast-int-fcmp-eq-0.ll7 ; CHECK-NEXT: ret i1 [[CMP]]
17 ; CHECK-NEXT: ret i1 [[CMP]]
27 ; CHECK-NEXT: ret i1 [[CMP]]
37 ; CHECK-NEXT: ret i1 [[CMP]]
47 ; CHECK-NEXT: ret i1 [[CMP]]
57 ; CHECK-NEXT: ret i1 [[CMP]]
67 ; CHECK-NEXT: ret i1 [[CMP]]
77 ; CHECK-NEXT: ret i1 [[CMP]]
87 ; CHECK-NEXT: ret i1 [[CMP]]
97 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcmp-intrinsic.ll18 ; CHECK-NEXT: ret i1 [[CMP]]
28 ; CHECK-NEXT: ret i1 [[CMP]]
48 ; CHECK-NEXT: ret i1 [[CMP]]
58 ; CHECK-NEXT: ret i1 [[CMP]]
78 ; CHECK-NEXT: ret i1 [[CMP]]
99 ; CHECK-NEXT: ret i1 [[CMP]]
122 ; CHECK-NEXT: ret i1 [[CMP]]
143 ; CHECK-NEXT: ret i1 [[CMP]]
153 ; CHECK-NEXT: ret i1 [[CMP]]
163 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dshl-unsigned-cmp-const.ll14 ; CHECK-NEXT: ret i1 [[CMP]]
26 ; CHECK-NEXT: ret i1 [[CMP]]
38 ; CHECK-NEXT: ret i1 [[CMP]]
50 ; CHECK-NEXT: ret i1 [[CMP]]
61 ; CHECK-NEXT: ret i1 [[CMP]]
72 ; CHECK-NEXT: ret i1 [[CMP]]
84 ; CHECK-NEXT: ret i1 [[CMP]]
96 ; CHECK-NEXT: ret i1 [[CMP]]
108 ; CHECK-NEXT: ret i1 [[CMP]]
205 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcast-unsigned-icmp-eqcmp-0.ll11 ; CHECK-NEXT: ret i1 [[CMP]]
22 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
33 ; CHECK-NEXT: ret <3 x i1> [[CMP]]
44 ; CHECK-NEXT: ret i1 [[CMP]]
55 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
66 ; CHECK-NEXT: ret <3 x i1> [[CMP]]
77 ; CHECK-NEXT: ret i1 [[CMP]]
88 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
110 ; CHECK-NEXT: ret i1 [[CMP]]
143 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dicmp-vec-inseltpoison.ll12 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
21 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
30 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
39 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
48 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
59 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
76 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
85 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
100 ; CHECK-NEXT: ret <3 x i1> [[CMP]]
109 ; CHECK-NEXT: ret <3 x i1> [[CMP]]
[all …]
H A Dicmp-xor-signbit.ll9 ; CHECK-NEXT: ret i1 [[CMP]]
22 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
35 ; CHECK-NEXT: ret i1 [[CMP]]
46 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
59 ; CHECK-NEXT: ret i1 [[CMP]]
70 ; CHECK-NEXT: ret <2 x i1> [[CMP]]
83 ; CHECK-NEXT: ret i1 [[CMP]]
107 ; CHECK-NEXT: ret i1 [[CMP]]
129 ; CHECK-NEXT: ret i1 [[CMP]]
151 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dfcmp-select.ll10 ; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[X:%.*]], 4.200000e+01
11 ; CHECK-NEXT: call void @use(i1 [[CMP]])
24 ; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[X:%.*]], 4.200000e+01
25 ; CHECK-NEXT: call void @use(i1 [[CMP]])
42 ; CHECK-NEXT: call void @use(i1 [[CMP]])
56 ; CHECK-NEXT: call void @use(i1 [[CMP]])
67 ; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[X:%.*]], [[Y:%.*]]
68 ; CHECK-NEXT: call void @use(i1 [[CMP]])
81 ; CHECK-NEXT: call void @use(i1 [[CMP]])
94 ; CHECK-NEXT: call void @use(i1 [[CMP]])
[all …]
H A Dicmp-mul-and.ll10 ; CHECK-NEXT: ret i1 [[CMP]]
27 ; CHECK-NEXT: ret i1 [[CMP]]
44 ; CHECK-NEXT: ret i1 [[CMP]]
59 ; CHECK-NEXT: ret i1 [[CMP]]
73 ; CHECK-NEXT: ret i1 [[CMP]]
87 ; CHECK-NEXT: ret i1 [[CMP]]
102 ; CHECK-NEXT: ret i1 [[CMP]]
114 ; CHECK-NEXT: ret i1 [[CMP]]
127 ; CHECK-NEXT: ret i1 [[CMP]]
140 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dfcmp.ll13 ; CHECK-NEXT: ret i1 [[CMP]]
24 ; CHECK-NEXT: ret i1 [[CMP]]
45 ; CHECK-NEXT: ret i1 [[CMP]]
56 ; CHECK-NEXT: ret i1 [[CMP]]
66 ; CHECK-NEXT: ret i1 [[CMP]]
76 ; CHECK-NEXT: ret i1 [[CMP]]
150 ; CHECK-NEXT: ret i1 [[CMP]]
161 ; CHECK-NEXT: ret i1 [[CMP]]
172 ; CHECK-NEXT: ret i1 [[CMP]]
183 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dassume2.ll11 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 5
12 ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
25 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 10
26 ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
40 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 5
41 ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
54 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 10
55 ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
68 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 4
69 ; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
[all …]
H A Dicmp-or.ll10 ; CHECK-NEXT: ret i1 [[CMP]]
31 ; CHECK-NEXT: ret i1 [[CMP]]
42 ; CHECK-NEXT: ret i1 [[CMP]]
52 ; CHECK-NEXT: ret i1 [[CMP]]
63 ; CHECK-NEXT: ret i1 [[CMP]]
74 ; CHECK-NEXT: ret i1 [[CMP]]
85 ; CHECK-NEXT: ret i1 [[CMP]]
96 ; CHECK-NEXT: ret i1 [[CMP]]
107 ; CHECK-NEXT: ret i1 [[CMP]]
119 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dicmp-dom.ll7 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[A:%.*]], 0
40 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[A:%.*]], 0
73 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[A:%.*]], 5
199 ; CHECK-NEXT: ret i1 [[CMP]]
219 ; CHECK-NEXT: ret i1 [[CMP]]
239 ; CHECK-NEXT: ret i1 [[CMP]]
259 ; CHECK-NEXT: ret i1 [[CMP]]
277 ; CHECK-NEXT: ret i1 [[CMP]]
297 ; CHECK-NEXT: ret i1 [[CMP]]
317 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dfloat-shrink-compare.ll10 ; CHECK-NEXT: ret i1 [[CMP]]
23 ; CHECK-NEXT: ret i1 [[CMP]]
36 ; CHECK-NEXT: ret i1 [[CMP]]
49 ; CHECK-NEXT: ret i1 [[CMP]]
75 ; CHECK-NEXT: ret i1 [[CMP]]
89 ; CHECK-NEXT: ret i1 [[CMP]]
102 ; CHECK-NEXT: ret i1 [[CMP]]
115 ; CHECK-NEXT: ret i1 [[CMP]]
128 ; CHECK-NEXT: ret i1 [[CMP]]
141 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
H A Dcast-select.ll6 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]]
7 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 0, i32 [[Z:%.*]]
19 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
32 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[X:%.*]], [[Y:%.*]]
33 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i8 42, i8 [[Z:%.*]]
45 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[X:%.*]], [[Y:%.*]]
58 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
60 ; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i16 42, i16 [[TMP1]]
71 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i64> [[X:%.*]], [[Y:%.*]]
84 ; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq float [[X:%.*]], [[Y:%.*]]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A DtestComparesi32gtu.ll18 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-LE \
22 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-BE \
102 ; CHECK-P10-CMP-LE-LABEL: testCompare1:
104 ; CHECK-P10-CMP-LE-NEXT: mflr r0
116 ; CHECK-P10-CMP-LE-NEXT: bl fn2
117 ; CHECK-P10-CMP-LE-NEXT: nop
120 ; CHECK-P10-CMP-LE-NEXT: mtlr r0
121 ; CHECK-P10-CMP-LE-NEXT: blr
123 ; CHECK-P10-CMP-BE-LABEL: testCompare1:
168 ; CHECK-P10-CMP-LABEL: testCompare2:
[all …]
H A DtestComparesi32ltu.ll18 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-LE \
23 ; RUN: FileCheck %s --check-prefixes=CHECK-P10-CMP,CHECK-P10-CMP-BE \
104 ; CHECK-P10-CMP-LE-LABEL: testCompare1:
106 ; CHECK-P10-CMP-LE-NEXT: mflr r0
118 ; CHECK-P10-CMP-LE-NEXT: bl fn2
119 ; CHECK-P10-CMP-LE-NEXT: nop
122 ; CHECK-P10-CMP-LE-NEXT: mtlr r0
123 ; CHECK-P10-CMP-LE-NEXT: blr
125 ; CHECK-P10-CMP-BE-LABEL: testCompare1:
169 ; CHECK-P10-CMP-LABEL: testCompare2:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dand-or-icmp-min-max.ll648 ; CHECK-NEXT: ret i1 [[CMP]]
659 ; CHECK-NEXT: ret i1 [[CMP]]
670 ; CHECK-NEXT: ret i1 [[CMP]]
681 ; CHECK-NEXT: ret i1 [[CMP]]
692 ; CHECK-NEXT: ret i1 [[CMP]]
703 ; CHECK-NEXT: ret i1 [[CMP]]
714 ; CHECK-NEXT: ret i1 [[CMP]]
725 ; CHECK-NEXT: ret i1 [[CMP]]
742 ; CHECK-NEXT: ret i1 [[CMP]]
753 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/CorrelatedValuePropagation/
H A Dshl.ll16 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[B:%.*]], 8
39 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[B:%.*]], 9
62 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[B:%.*]], 6
85 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[B:%.*]], 7
126 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[B:%.*]], 7
158 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[B:%.*]], 0
385 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[SHL]], 0
386 ; CHECK-NEXT: ret i1 [[CMP]]
400 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[SHL]], 2
401 ; CHECK-NEXT: ret i1 [[CMP]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/TypePromotion/ARM/
H A Dwrapping.ll8 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[OR]], 1024
9 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP]], i16 2, i16 5
23 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[OR]], 1024
38 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[OR]], 1024
53 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i16 [[OR]], 1024
80 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[ADD]], -128
93 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[ADD]], -128
107 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[ADD]], -2
121 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[ADD]], 254
163 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SUB]], -6
[all …]
H A Dicmps.ll8 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[ADD]], -2
23 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[ADD]], -2
38 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[ADD]], -2
53 ; CHECK-NEXT: [[CMP:%.*]] = icmp sle i8 [[ADD]], -2
69 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[ADD]], 1
84 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[ADD]], 1
99 ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[SUB]], 1
114 ; CHECK-NEXT: [[CMP:%.*]] = icmp sge i8 [[SUB]], 1
132 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[ADD]], -2
153 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[ADD]], -2
[all …]

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