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/linux-6.15/Documentation/arch/riscv/
H A Dvector.rst4 Vector Extension Support for RISC-V Linux
8 order to support the use of the RISC-V Vector Extension.
14 status for the use of Vector in userspace. The intended usage guideline for
26 Sets the Vector enablement status of the calling thread, where the control
37 * :c:macro:`PR_RISCV_V_VSTATE_CTRL_ON`: Allow Vector to be run for the
40 * :c:macro:`PR_RISCV_V_VSTATE_CTRL_OFF`: Disallow Vector. Executing Vector
77 * EPERM: Turning off Vector in PR_RISCV_V_VSTATE_CTRL_CUR_MASK if Vector
100 * EINVAL: Vector not supported.
107 developers to control the default Vector enablement status for userspace
117 * 1: Allow Vector code to be executed as the default for new processes.
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H A Dhwprobe.rst82 version 1.0 of the RISC-V Vector extension manual.
167 defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
171 defined in the RISC-V Vector manual starting from commit e2ccd0548d6c
201 * :c:macro:`RISCV_HWPROBE_EXT_ZVE32X`: The Vector sub-extension Zve32x is
202 supported, as defined by version 1.0 of the RISC-V Vector extension manual.
204 * :c:macro:`RISCV_HWPROBE_EXT_ZVE32F`: The Vector sub-extension Zve32f is
205 supported, as defined by version 1.0 of the RISC-V Vector extension manual.
207 * :c:macro:`RISCV_HWPROBE_EXT_ZVE64X`: The Vector sub-extension Zve64x is
208 supported, as defined by version 1.0 of the RISC-V Vector extension manual.
210 * :c:macro:`RISCV_HWPROBE_EXT_ZVE64F`: The Vector sub-extension Zve64f is
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/linux-6.15/tools/testing/selftests/arm64/fp/
H A DREADME28 Vector length: 512 bits
31 Vector length: 512 bits
34 Vector length: 512 bits
37 Vector length: 512 bits
40 Vector length: 512 bits
43 Vector length: 512 bits
46 Vector length: 512 bits
49 Vector length: 512 bits
52 Vector length: 512 bits
88 2) Run the sve-stress on *each* guest with the Vector-Length set to 32:
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/linux-6.15/arch/x86/crypto/
H A DKconfig34 - VAES (Vector AES)
74 - AVX (Advanced Vector Extensions)
85 - AVX2 (Advanced Vector Extensions 2)
100 - AVX (Advanced Vector Extensions)
118 - AVX (Advanced Vector Extensions)
181 - AVX (Advanced Vector Extensions)
211 - AVX (Advanced Vector Extensions)
292 - AVX (Advanced Vector Extensions)
309 - AVX (Advanced Vector Extensions)
446 - AVX (Advanced Vector Extensions)
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/linux-6.15/arch/sh/kernel/cpu/sh2/
H A Dex.S13 ! convert Exception Vector to Exception Number
36 ! Exception Vector Base
/linux-6.15/arch/sh/kernel/cpu/sh2a/
H A Dex.S13 ! convert Exception Vector to Exception Number
57 ! Exception Vector Base
/linux-6.15/drivers/net/can/softing/
H A DKconfig7 from Vector Gmbh.
25 from Vector Gmbh.
/linux-6.15/arch/arc/kernel/
H A Dentry-arcv2.S24 ;############################ Vector Table #################################
30 VECTOR res_service ; Reset Vector
121 ; Instruction fetch or Data access, under a single Exception Vector
H A Dentry-compact.S65 ;############################ Vector Table #################################
86 VECTOR res_service ; 0x0, Reset Vector (0x0)
/linux-6.15/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,htvec.yaml7 title: Loongson-3 HyperTransport Interrupt Vector Controller
H A Darm,nvic.txt1 * ARM Nested Vector Interrupt Controller (NVIC)
/linux-6.15/Documentation/arch/x86/
H A Dintel-hfi.rst47 Local Vector Table of a CPU's local APIC, there exists a register for the
62 thermal entry in the Local APIC's Local Vector Table.
/linux-6.15/arch/arc/include/asm/
H A Dentry-arcv2.h51 ; Before jumping to Interrupt Vector, hardware micro-ops did following: variable
80 ; Before jumping to Exception Vector, hardware micro-ops did following: variable
/linux-6.15/Documentation/arch/arm64/
H A Dsve.rst2 Scalable Vector Extension support for AArch64 Linux
10 order to support use of the ARM Scalable Vector Extension (SVE), including
90 2. Vector length terminology
98 * Vector length (VL) = size of a Z-register in bytes
100 * Vector quadwords (VQ) = size of a Z-register in units of 128 bits
273 Vector length will be inherited across execve().
457 * The arm64 specific DWARF standard [5] added the VG (Vector Granule) register
/linux-6.15/Documentation/translations/zh_TW/arch/loongarch/
H A Dirq-chip-model.rst15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片組的主中
/linux-6.15/Documentation/translations/zh_CN/core-api/irq/
H A Dirq-domain.rst200 CPU Vector irq_domain (root irq_domain to manage CPU vectors)
/linux-6.15/arch/powerpc/boot/dts/fsl/
H A De500v2_power_isa.dtsi49 power-isa-sp.fv; // SPE.Embedded Float Vector
H A De500v1_power_isa.dtsi48 power-isa-sp.fv; // SPE.Embedded Float Vector
H A De6500_power_isa.dtsi60 power-isa-v; // Vector (AltiVec)
/linux-6.15/Documentation/devicetree/bindings/riscv/
H A Dextensions.yaml519 in commit 6f702a2 ("Vector extensions are now ratified") of
525 in commit 6f702a2 ("Vector extensions are now ratified") of
531 in commit 6f702a2 ("Vector extensions are now ratified") of
537 in commit 6f702a2 ("Vector extensions are now ratified") of
543 in commit 6f702a2 ("Vector extensions are now ratified") of
596 The standard Zvkned extension for Vector AES block cipher
/linux-6.15/Documentation/translations/zh_CN/arch/loongarch/
H A Dirq-chip-model.rst15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
/linux-6.15/drivers/zorro/
H A Dzorro.ids267 f300 Vector [SCSI Host Adapter]
268 f400 Vector [SCSI Host Adapter]
269 0841 Vector
/linux-6.15/tools/perf/Documentation/
H A Dperf-timechart.txt22 'perf timechart' to turn a trace into a Scalable Vector Graphics file,
/linux-6.15/arch/riscv/
H A DKconfig629 bool "Vector extension support"
635 Add support for the Vector extension when it is detected at boot.
642 bool "Enable userspace Vector by default"
646 Say Y here if you want to enable Vector in userspace by default.
648 Vector, or enable it via the sysctl interface.
661 bool "Run kernel-mode Vector with kernel preemption"
672 consumption due to the allocation of per-task's kernel Vector context.
973 prompt "Vector unaligned Accesses Support"
/linux-6.15/drivers/irqchip/
H A DKconfig684 Support for the Loongson3 Extend I/O Interrupt Vector Controller.
696 bool "Loongson HyperTransport Interrupt Vector Controller"
701 Support for the Loongson HyperTransport Interrupt Vector Controller.

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