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Searched refs:IsAdd (Results 1 – 21 of 21) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Support/
H A DDivisionByConstantInfo.cpp81 Retval.IsAdd = false; // initialize "add" indicator in get()
110 Retval.IsAdd = true; in get()
120 Retval.IsAdd = true; in get()
134 if (Retval.IsAdd && !D[0] && AllowEvenDivisorOptimization) { in get()
139 assert(Retval.IsAdd == 0 && Retval.PreShift == 0); in get()
148 if (Retval.IsAdd) { in get()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp452 unsigned Reg, int NumBytes, bool IsAdd, in emitRegUpdate() argument
456 Opc = IsAdd ? ARC::ADD_rru6 : ARC::SUB_rru6; in emitRegUpdate()
458 Opc = IsAdd ? ARC::ADD_rrs12 : ARC::SUB_rrs12; in emitRegUpdate()
460 Opc = IsAdd ? ARC::ADD_rrlimm : ARC::SUB_rrlimm; in emitRegUpdate()
484 bool IsAdd = (Old.getOpcode() == ARC::ADJCALLSTACKUP); in eliminateCallFramePseudoInstr() local
485 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Support/
H A DDivisionByConstantInfo.h33 bool IsAdd; ///< add indicator member
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopFlatten.cpp197 bool IsAdd = match(U, m_c_Add(m_Specific(InnerInductionPHI), in matchLinearIVUser() local
233 if (Widened && (IsAdd || IsGEP) && in matchLinearIVUser()
245 if ((IsAdd || IsAddTrunc || IsGEP) && MatchedItCount == InnerTripCount) { in matchLinearIVUser()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DComplexDeinterleavingPass.cpp657 auto IsAdd = [](unsigned Op) { in identifyPartialMul() local
664 if (IsAdd(Real->getOpcode()) && IsAdd(Imag->getOpcode())) in identifyPartialMul()
666 else if (IsSub(Real->getOpcode()) && IsAdd(Imag->getOpcode())) in identifyPartialMul()
670 else if (IsAdd(Real->getOpcode()) && IsSub(Imag->getOpcode())) in identifyPartialMul()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp828 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64() local
851 unsigned Opc = OpcMap[0][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
852 unsigned CarryOpc = OpcMap[1][N->isDivergent()][IsAdd]; in SelectADD_SUB_I64()
912 bool IsAdd = N->getOpcode() == ISD::UADDO; in SelectUADDO_USUBO() local
918 if ((IsAdd && (UI->getOpcode() != ISD::UADDO_CARRY)) || in SelectUADDO_USUBO()
919 (!IsAdd && (UI->getOpcode() != ISD::USUBO_CARRY))) { in SelectUADDO_USUBO()
926 unsigned Opc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in SelectUADDO_USUBO()
H A DAMDGPUInstructionSelector.cpp427 const bool IsAdd = I.getOpcode() == AMDGPU::G_UADDO || in selectG_UADDO_USUBO_UADDE_USUBE() local
434 IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
435 unsigned CarryOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in selectG_UADDO_USUBO_UADDE_USUBE()
450 unsigned NoCarryOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
451 unsigned CarryOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in selectG_UADDO_USUBO_UADDE_USUBE()
H A DSIISelLowering.cpp4756 bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local
4758 unsigned Opc = IsAdd ? AMDGPU::S_ADD_U64 : AMDGPU::S_SUB_U64; in EmitInstrWithCustomInserter()
4779 unsigned LoOpc = IsAdd ? AMDGPU::S_ADD_U32 : AMDGPU::S_SUB_U32; in EmitInstrWithCustomInserter()
4780 unsigned HiOpc = IsAdd ? AMDGPU::S_ADDC_U32 : AMDGPU::S_SUBB_U32; in EmitInstrWithCustomInserter()
4803 bool IsAdd = (MI.getOpcode() == AMDGPU::V_ADD_U64_PSEUDO); in EmitInstrWithCustomInserter() local
4809 if (IsAdd && ST.hasLshlAddB64()) { in EmitInstrWithCustomInserter()
4850 unsigned LoOpc = IsAdd ? AMDGPU::V_ADD_CO_U32_e64 : AMDGPU::V_SUB_CO_U32_e64; in EmitInstrWithCustomInserter()
4857 unsigned HiOpc = IsAdd ? AMDGPU::V_ADDC_U32_e64 : AMDGPU::V_SUBB_U32_e64; in EmitInstrWithCustomInserter()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp7460 if (IsAdd) in lowerSADDO_SSUBO()
7490 bool IsAdd; in lowerAddSubSatToMinMax() local
7497 IsAdd = true; in lowerAddSubSatToMinMax()
7502 IsAdd = true; in lowerAddSubSatToMinMax()
7507 IsAdd = false; in lowerAddSubSatToMinMax()
7512 IsAdd = false; in lowerAddSubSatToMinMax()
7534 if (IsAdd) { in lowerAddSubSatToMinMax()
7566 bool IsAdd; in lowerAddSubSatToAddoSubo() local
7573 IsAdd = true; in lowerAddSubSatToAddoSubo()
7578 IsAdd = true; in lowerAddSubSatToAddoSubo()
[all …]
H A DCombinerHelper.cpp5064 assert((!magics.IsAdd || magics.PreShift == 0) && "Unexpected pre-shift"); in buildUDivUsingMul()
5067 SelNPQ = magics.IsAdd; in buildUDivUsingMul()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp6385 assert((!magics.IsAdd || magics.PreShift == 0) && in BuildUDIV()
6390 magics.IsAdd ? APInt::getOneBitSet(EltBits, EltBits - 1) in BuildUDIV()
6393 UseNPQ |= magics.IsAdd; in BuildUDIV()
10387 bool IsAdd = Node->getOpcode() == ISD::UADDO; in expandUADDSUBO() local
10400 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandUADDSUBO()
10407 if (IsAdd && isOneConstant(RHS)) { in expandUADDSUBO()
10416 } else if (IsAdd && isAllOnesConstant(RHS)) { in expandUADDSUBO()
10422 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in expandUADDSUBO()
10433 bool IsAdd = Node->getOpcode() == ISD::SADDO; in expandSADDSUBO() local
10435 Result = DAG.getNode(IsAdd ? ISD::ADD : ISD::SUB, dl, in expandSADDSUBO()
[all …]
H A DLegalizeDAG.cpp3857 bool IsAdd = Node->getOpcode() == ISD::UADDO_CARRY; in ExpandNode() local
3860 unsigned Op = IsAdd ? ISD::ADD : ISD::SUB; in ExpandNode()
3867 ISD::CondCode CC = IsAdd ? ISD::SETULT : ISD::SETUGT; in ExpandNode()
3882 IsAdd ? DAG.getSetCC(dl, SetCCType, Sum2, Zero, ISD::SETEQ) in ExpandNode()
H A DDAGCombiner.cpp2631 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubBoolOfMaskedVal() local
2632 SDValue C = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubBoolOfMaskedVal()
2633 SDValue Z = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubBoolOfMaskedVal()
2671 bool IsAdd = N->getOpcode() == ISD::ADD; in foldAddSubOfSignBit() local
2672 SDValue ConstantOp = IsAdd ? N->getOperand(1) : N->getOperand(0); in foldAddSubOfSignBit()
2673 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit()
2695 IsAdd ? ISD::ADD : ISD::SUB, DL, VT, in foldAddSubOfSignBit()
3137 return DAG.getNode(IsAdd ? ISD::SUB : ISD::ADD, DL, VT, N0, N10); in foldAddSubMasked1()
10404 bool IsAdd = N0.getOpcode() == ISD::ADD; in visitSRA() local
10405 SDValue Shl = N0.getOperand(IsAdd ? 0 : 1); in visitSRA()
[all …]
H A DLegalizeIntegerTypes.cpp4327 bool IsAdd = Node->getOpcode() == ISD::SADDO; in ExpandIntRes_SADDSUBO() local
4328 unsigned CarryOp = IsAdd ? ISD::SADDO_CARRY : ISD::SSUBO_CARRY; in ExpandIntRes_SADDSUBO()
4340 Lo = DAG.getNode(IsAdd ? ISD::UADDO : ISD::USUBO, dl, VTList, {LHSL, RHSL}); in ExpandIntRes_SADDSUBO()
4377 if (IsAdd) in ExpandIntRes_SADDSUBO()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp11682 bool IsAdd = N->getOpcode() == ISD::UADDO; in ReplaceNodeResults() local
11692 if (IsAdd && isOneConstant(RHS)) { in ReplaceNodeResults()
11700 } else if (IsAdd && isAllOnesConstant(RHS)) { in ReplaceNodeResults()
11710 IsAdd ? ISD::SETULT : ISD::SETUGT); in ReplaceNodeResults()
14220 bool IsAdd = N->getOpcode() == RISCVISD::FADD_VL; in performFADDSUB_VLCombine() local
14239 if (!IsAdd) in performFADDSUB_VLCombine()
14256 if (IsAdd) in performFADDSUB_VLCombine()
14310 bool IsAdd = N0.getOpcode() == ISD::ADD; in performSRACombine() local
14311 if ((IsAdd || N0.getOpcode() == ISD::SUB)) { in performSRACombine()
14331 Shl = N0.getOperand(IsAdd ? 0 : 1); in performSRACombine()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSelect.cpp1968 auto IsSignedSaturateLimit = [&](Value *Limit, bool IsAdd) { in foldOverflowingAddSubSelect() argument
1989 if (IsAdd) { in foldOverflowingAddSubSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1038 bool IsAdd = ROOTNode->getOpcode() == ISD::ADD; in performMADD_MSUBCombine() local
1039 unsigned Opcode = IsAdd ? (IsUnsigned ? MipsISD::MAddu : MipsISD::MAdd) in performMADD_MSUBCombine()
/freebsd-14.2/contrib/llvm-project/clang/lib/Sema/
H A DSemaOpenMP.cpp8493 bool IsAdd = BO->getOpcode() == BO_Add; in checkAndSetIncRHS() local
8495 return setStep(BO->getRHS(), !IsAdd); in checkAndSetIncRHS()
8496 if (IsAdd && getInitLCDecl(BO->getRHS()) == LCDecl) in checkAndSetIncRHS()
8500 bool IsAdd = CE->getOperator() == OO_Plus; in checkAndSetIncRHS() local
8501 if ((IsAdd || CE->getOperator() == OO_Minus) && CE->getNumArgs() == 2) { in checkAndSetIncRHS()
8503 return setStep(CE->getArg(1), !IsAdd); in checkAndSetIncRHS()
8504 if (IsAdd && getInitLCDecl(CE->getArg(1)) == LCDecl) in checkAndSetIncRHS()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp18018 bool IsAdd = ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::OR)); in setAlignFlagsForFI() local
18019 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(IsAdd ? N.getOperand(0) : N); in setAlignFlagsForFI()
18033 if (!IsAdd) { in setAlignFlagsForFI()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp18938 static SDValue foldOverflowCheck(SDNode *Op, SelectionDAG &DAG, bool IsAdd) { in foldOverflowCheck() argument
18943 if (IsAdd) { in foldOverflowCheck()
18951 SDValue CsetOp = CmpOp->getOperand(IsAdd ? 0 : 1); in foldOverflowCheck()
18953 if (CC != (IsAdd ? AArch64CC::HS : AArch64CC::LO)) in foldOverflowCheck()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp31388 bool IsAdd = Opc == ISD::UADDO_CARRY || Opc == ISD::SADDO_CARRY; in LowerADDSUBO_CARRY() local
31389 SDValue Sum = DAG.getNode(IsAdd ? X86ISD::ADC : X86ISD::SBB, DL, VTs, in LowerADDSUBO_CARRY()
50889 bool IsAdd = (Opcode == ISD::FADD) || (Opcode == ISD::ADD); in combineToHorizontalAddSub() local
50899 auto HorizOpcode = IsAdd ? X86ISD::FHADD : X86ISD::FHSUB; in combineToHorizontalAddSub()
50900 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub()
50916 auto HorizOpcode = IsAdd ? X86ISD::HADD : X86ISD::HSUB; in combineToHorizontalAddSub()
50917 if (isHorizontalBinOp(HorizOpcode, LHS, RHS, DAG, Subtarget, IsAdd, in combineToHorizontalAddSub()