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Searched refs:uart_getreg (Results 1 – 13 of 13) sorted by relevance

/freebsd-13.1/sys/mips/cavium/
H A Duart_dev_oct16550.c89 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
93 (void)uart_getreg(bas, REG_LSR); in oct16550_clrint()
97 (void)uart_getreg(bas, REG_MSR); in oct16550_clrint()
101 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
116 lcr = uart_getreg(bas, REG_LCR); in oct16550_delay()
119 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in oct16550_delay()
286 val = uart_getreg(bas, REG_IIR); in oct16550_probe()
289 val = uart_getreg(bas, REG_MCR); in oct16550_probe()
292 val = uart_getreg(bas, REG_USR); in oct16550_probe()
374 c = uart_getreg(bas, REG_DATA); in oct16550_getc()
[all …]
/freebsd-13.1/sys/dev/uart/
H A Duart_dev_ns8250.c92 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
96 lsr = uart_getreg(bas, REG_LSR); in ns8250_clrint()
100 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
102 (void)uart_getreg(bas, REG_MSR); in ns8250_clrint()
104 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
114 lcr = uart_getreg(bas, REG_LCR); in ns8250_delay()
117 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in ns8250_delay()
286 val = uart_getreg(bas, REG_IIR); in ns8250_probe()
295 val = uart_getreg(bas, REG_MCR); in ns8250_probe()
378 c = uart_getreg(bas, REG_DATA); in ns8250_getc()
[all …]
H A Duart_dev_mvebu.c183 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_param()
211 ccr = uart_getreg(bas, UART_CCR); in uart_mvebu_param()
268 c = uart_getreg(bas, UART_RBR) & 0xff; in uart_mvebu_getc()
339 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_attach()
369 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_flush()
415 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_ioctl()
447 ipend = uart_getreg(bas, UART_STAT); in uart_mvebu_bus_ipend()
448 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_ipend()
518 xc = uart_getreg(bas, UART_RBR); in uart_mvebu_bus_receive()
564 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_transmit()
[all …]
H A Duart_dev_msm.c235 if (!(uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXEMT)) { in msm_putc()
236 while ((uart_getreg(bas, UART_DM_ISR) & UART_DM_TX_READY) == 0 in msm_putc()
245 while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXRDY) == 0) in msm_putc()
257 return ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) == in msm_rxready()
269 while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) != in msm_getc()
274 if (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_UART_OVERRUN) in msm_getc()
278 c = uart_getreg(bas, UART_DM_RF(0)); in msm_getc()
414 while (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) { in msm_bus_receive()
422 c = uart_getreg(bas, UART_DM_RF(0)); in msm_bus_receive()
H A Duart_dev_z8530.c71 return (uart_getreg(bas, REG_CTRL)); in uart_getmreg()
233 while (!(uart_getreg(bas, REG_CTRL) & BES_TXE)) in z8530_putc()
243 return ((uart_getreg(bas, REG_CTRL) & BES_RXA) != 0 ? 1 : 0); in z8530_rxready()
253 while (!(uart_getreg(bas, REG_CTRL) & BES_RXA)) { in z8530_getc()
259 c = uart_getreg(bas, REG_DATA); in z8530_getc()
547 xc = uart_getreg(bas, REG_DATA); in z8530_bus_receive()
565 (void)uart_getreg(bas, REG_DATA); in z8530_bus_receive()
H A Duart_dev_ti8250.c87 while (uart_getreg(&sc->sc_bas, SYSS_REG) & SYSS_STATUS_RESETDONE) in ti8250_bus_probe()
H A Duart.h54 uart_getreg(struct uart_bas *bas, int reg) in uart_getreg() function
/freebsd-13.1/sys/arm/freescale/vybrid/
H A Dvf_uart.c169 usr1 = uart_getreg(bas, UART_S1); in vf_uart_rxready()
187 c = uart_getreg(bas, UART_D); in vf_uart_getc()
220 reg = uart_getreg(bas, UART_C2); in uart_reinit()
229 reg = uart_getreg(bas, UART_BDH); in uart_reinit()
237 reg = uart_getreg(bas, UART_C4); in uart_reinit()
242 reg = uart_getreg(bas, UART_C2); in uart_reinit()
304 reg = uart_getreg(bas, UART_C2); in vf_uart_bus_attach()
379 usr1 = uart_getreg(bas, UART_S1); in vf_uart_bus_ipend()
459 c = uart_getreg(bas, UART_D); in vf_uart_bus_receive()
464 reg = uart_getreg(bas, UART_C2); in vf_uart_bus_receive()
[all …]
/freebsd-13.1/sys/mips/mediatek/
H A Duart_dev_mtk.c176 c = uart_getreg(bas, UART_RX_REG); in mtk_uart_getc()
259 cr = uart_getreg(bas, UART_IER_REG); in mtk_uart_disable_txintr()
274 cr = uart_getreg(bas, UART_IER_REG); in mtk_uart_enable_txintr()
308 uart_getreg(bas, UART_FCR_REG) | in mtk_uart_bus_attach()
382 divisor = uart_getreg(bas, UART_CDDL_REG); in mtk_uart_bus_ioctl()
407 iir = uart_getreg(&sc->sc_bas, UART_IIR_REG); in mtk_uart_bus_ipend()
408 lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG); in mtk_uart_bus_ipend()
477 lsr = uart_getreg(bas, UART_LSR_REG); in mtk_uart_bus_receive()
484 xc = uart_getreg(bas, UART_RX_REG); in mtk_uart_bus_receive()
493 lsr = uart_getreg(bas, UART_LSR_REG); in mtk_uart_bus_receive()
[all …]
H A Duart_dev_mtk.h36 #undef uart_getreg
38 #define uart_getreg(bas, reg) \ macro
/freebsd-13.1/sys/riscv/sifive/
H A Dsifive_uart.c269 reg = uart_getreg(bas, SFUART_TXDATA); in sfuart_bus_flush()
275 reg = uart_getreg(bas, SFUART_RXDATA); in sfuart_bus_flush()
340 reg = uart_getreg(bas, SFUART_DIV); in sfuart_bus_ioctl()
370 reg = uart_getreg(bas, SFUART_IRQ_PENDING); in sfuart_bus_ipend()
371 ie = uart_getreg(bas, SFUART_IRQ_ENABLE); in sfuart_bus_ipend()
407 reg = uart_getreg(bas, SFUART_TXCTRL); in sfuart_bus_param()
435 reg = uart_getreg(bas, SFUART_RXDATA); in sfuart_bus_receive()
444 reg = uart_getreg(bas, SFUART_RXDATA); in sfuart_bus_receive()
462 reg = uart_getreg(bas, SFUART_IRQ_ENABLE); in sfuart_bus_transmit()
485 reg = uart_getreg(bas, SFUART_IRQ_ENABLE); in sfuart_bus_grab()
[all …]
/freebsd-13.1/sys/arm/nvidia/
H A Dtegra_uart.c82 ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; in tegra_uart_attach()
102 ier = uart_getreg(bas, REG_IER); in tegra_uart_grab()
105 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0) in tegra_uart_grab()
/freebsd-13.1/sys/mips/ingenic/
H A Djz4780_uart.c79 ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; in jz4780_bus_attach()