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Searched refs:fixed_vector (Results 1 – 22 of 22) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LegalizerInfo.cpp297 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE1()
298 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE1()
330 const LLT v16s8 = LLT::fixed_vector(16, 8); in setLegalizerInfoSSE2()
331 const LLT v8s16 = LLT::fixed_vector(8, 16); in setLegalizerInfoSSE2()
332 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE2()
333 const LLT v2s64 = LLT::fixed_vector(2, 64); in setLegalizerInfoSSE2()
335 const LLT v32s8 = LLT::fixed_vector(32, 8); in setLegalizerInfoSSE2()
337 const LLT v8s32 = LLT::fixed_vector(8, 32); in setLegalizerInfoSSE2()
338 const LLT v4s64 = LLT::fixed_vector(4, 64); in setLegalizerInfoSSE2()
380 const LLT v4s32 = LLT::fixed_vector(4, 32); in setLegalizerInfoSSE41()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp49 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
50 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
51 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
52 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
53 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
54 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
55 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
56 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo()
57 const LLT v2s64 = LLT::fixed_vector(2, 64); in AArch64LegalizerInfo()
58 const LLT v2p0 = LLT::fixed_vector(2, p0); in AArch64LegalizerInfo()
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H A DAArch64InstructionSelector.cpp1748 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorSHL()
1750 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorSHL()
1760 } else if (Ty == LLT::fixed_vector(8, 8)) { in selectVectorSHL()
1802 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorAshrLshr()
1820 } else if (Ty == LLT::fixed_vector(8, 8)) { in selectVectorAshrLshr()
3304 if (VecTy == LLT::fixed_vector(8, 8)) in select()
3351 if (VecTy == LLT::fixed_vector(2, 32)) { in selectReduction()
3364 if (VecTy == LLT::fixed_vector(16, 8)) in selectReduction()
3382 if (VecTy == LLT::fixed_vector(2, 32)) in selectReduction()
5077 if (Ty == LLT::fixed_vector(8, S8)) in selectIntrinsicWithSideEffects()
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H A DAArch64PostLegalizerLowering.cpp708 if (SrcTy == LLT::fixed_vector(2, LLT::scalar(32))) { in applyDupLane()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp445 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
446 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
447 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
449 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
450 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
451 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
452 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
453 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
454 const LLT V7S32 = LLT::fixed_vector(7, 32); in AMDGPULegalizerInfo()
455 const LLT V8S32 = LLT::fixed_vector(8, 32); in AMDGPULegalizerInfo()
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H A DAMDGPUArgumentUsageInfo.cpp95 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp133 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
H A DAMDGPURegisterBankInfo.cpp1137 return LLT::fixed_vector(128 / EltTy.getSizeInBits(), EltTy); in widen96To128()
1717 return B.buildMerge(LLT::fixed_vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
2121 LLT MergeTy = LLT::fixed_vector(Ops.size(), EltTy); in foldInsertEltToCmpSelect()
2411 if (DstTy != LLT::scalar(16) && DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2604 if (DstTy != LLT::fixed_vector(2, 16)) in applyMappingImpl()
2736 LLT Vec32 = LLT::fixed_vector(2 * SrcTy.getNumElements(), 32); in applyMappingImpl()
2853 LLT Vec32 = LLT::fixed_vector(2 * VecTy.getNumElements(), 32); in applyMappingImpl()
3691 if (DstTy == LLT::fixed_vector(2, 16)) { in getInstrMapping()
H A DAMDGPUInstructionSelector.cpp593 const LLT V2S16 = LLT::fixed_vector(2, 16); in selectG_BUILD_VECTOR_TRUNC()
1910 if (DstTy == LLT::fixed_vector(2, 16) && SrcTy == LLT::fixed_vector(2, 32)) { in selectG_TRUNC()
2840 const LLT V2S16 = LLT::fixed_vector(2, 16); in selectG_SHUFFLE_VECTOR()
3361 MRI.getType(Src) == LLT::fixed_vector(2, 16)) { in selectVOP3PModsImpl()
H A DAMDGPUCallLowering.cpp1091 auto ScratchRSrcReg = MIRBuilder.buildCopy(LLT::fixed_vector(4, 32), in handleImplicitCallArguments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp74 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
75 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
76 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
77 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Support/
H A DLowLevelTypeImpl.h75 static LLT fixed_vector(unsigned NumElements, unsigned ScalarSizeInBits) { in fixed_vector() function
81 static LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizeMutations.cpp73 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
H A DLegacyLegalizerInfo.cpp345 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
359 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DUtils.cpp799 return LLT::fixed_vector(LCMSize / OrigElt.getSizeInBits(), OrigElt); in getLCMType()
804 return LLT::fixed_vector(LCMSize / OrigSize, OrigTy); in getLCMType()
848 return LLT::fixed_vector(GCD / OrigElt.getSizeInBits(), OrigElt); in getGCDType()
H A DCallLowering.cpp439 LLT BVType = LLT::fixed_vector(LLTy.getNumElements(), PartLLT); in buildCopyFromRegs()
H A DIRTranslator.cpp1490 .buildSplatVector(LLT::fixed_vector(VectorWidth, PtrTy), BaseReg) in translateGetElementPtr()
H A DLegalizerHelper.cpp2611 DstCastTy = LLT::fixed_vector(NumDstElt / NumSrcElt, DstEltTy); in lowerBitcast()
2623 SrcPartTy = LLT::fixed_vector(NumSrcElt / NumDstElt, SrcEltTy); in lowerBitcast()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1025 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMinNumElements()
H A DLegalizationArtifactCombiner.h611 LLT NewBVTy = LLT::fixed_vector(NumSrcsUsed, SrcTy); in findValueFromBuildVector()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp1879 Ty = LLT::fixed_vector(NumElements, Ty); in parseLowLevelType()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1876 Ty == LLT::fixed_vector(2, 64); in allowsMisalignedMemoryAccesses()
12028 return LLT::fixed_vector(2, 64); in getOptimalMemOpLLT()