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Searched refs:setOpcode (Results 1 – 25 of 66) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCDuplexInfo.cpp735 Result.setOpcode(Hexagon::SA1_addi); in deriveSubInst()
741 Result.setOpcode(Hexagon::SA1_addrx); in deriveSubInst()
752 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst()
757 Result.setOpcode(Hexagon::SA1_and1); in deriveSubInst()
958 Result.setOpcode(Hexagon::SA1_sxtb); in deriveSubInst()
963 Result.setOpcode(Hexagon::SA1_sxth); in deriveSubInst()
968 Result.setOpcode(Hexagon::SA1_tfr); in deriveSubInst()
983 Result.setOpcode(Hexagon::SA1_clrf); in deriveSubInst()
988 Result.setOpcode(Hexagon::SA1_clrt); in deriveSubInst()
1006 Result.setOpcode(Hexagon::SA1_zxtb); in deriveSubInst()
[all …]
H A DHexagonMCCompound.cpp215 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
228 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
242 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
255 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
268 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
286 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
304 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
315 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
326 CompoundInsn->setOpcode(compoundOpcode); in getCompoundInsn()
/freebsd-12.1/contrib/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp287 Inst.setOpcode(XCore::ADD_3r); in Decode2OpInstructionFail()
290 Inst.setOpcode(XCore::SUB_3r); in Decode2OpInstructionFail()
293 Inst.setOpcode(XCore::SHL_3r); in Decode2OpInstructionFail()
296 Inst.setOpcode(XCore::SHR_3r); in Decode2OpInstructionFail()
299 Inst.setOpcode(XCore::EQ_3r); in Decode2OpInstructionFail()
302 Inst.setOpcode(XCore::AND_3r); in Decode2OpInstructionFail()
305 Inst.setOpcode(XCore::OR_3r); in Decode2OpInstructionFail()
308 Inst.setOpcode(XCore::LDW_3r); in Decode2OpInstructionFail()
314 Inst.setOpcode(XCore::LD8U_3r); in Decode2OpInstructionFail()
335 Inst.setOpcode(XCore::LSS_3r); in Decode2OpInstructionFail()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp257 T.setOpcode(Inst.getOpcode()); in ScaleVectorOffset()
286 Inst.setOpcode(Hexagon::A2_addi); in HexagonProcessInstruction()
300 Inst.setOpcode(Hexagon::A2_paddif); in HexagonProcessInstruction()
307 Inst.setOpcode(Hexagon::A2_paddit); in HexagonProcessInstruction()
314 Inst.setOpcode(Hexagon::A2_paddifnew); in HexagonProcessInstruction()
328 Inst.setOpcode(Hexagon::A2_andir); in HexagonProcessInstruction()
373 MappedInst.setOpcode(Hexagon::C2_or); in HexagonProcessInstruction()
429 Inst.setOpcode(Hexagon::J2_call); in HexagonProcessInstruction()
504 TmpInst.setOpcode(Hexagon::A2_tfr); in HexagonProcessInstruction()
618 TmpInst.setOpcode(Hexagon::V6_vxor); in HexagonProcessInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp164 MCB.setOpcode(Hexagon::BUNDLE); in HexagonAsmParser()
534 NewInst.setOpcode(MCI.getOpcode()); in canonicalizeImmediates()
1227 TmpInst.setOpcode(opCode); in makeCombineInst()
1315 Inst.setOpcode(Hexagon::A2_addi); in processInstruction()
1349 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction()
1389 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1435 Inst.setOpcode(Hexagon::V6_vcombine); in processInstruction()
1677 Inst.setOpcode(Hexagon::M2_mpyi); in processInstruction()
1713 TmpInst.setOpcode(Hexagon::A2_tfr); in processInstruction()
1787 Inst.setOpcode(Hexagon::A2_addsph); in processInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp734 TmpInst.setOpcode(PPC::DCBT); in ProcessInstruction()
744 TmpInst.setOpcode(PPC::DCBTST); in ProcessInstruction()
761 TmpInst.setOpcode(PPC::DCBF); in ProcessInstruction()
770 TmpInst.setOpcode(PPC::LA); in ProcessInstruction()
779 TmpInst.setOpcode(PPC::ADDI); in ProcessInstruction()
788 TmpInst.setOpcode(PPC::ADDIS); in ProcessInstruction()
797 TmpInst.setOpcode(PPC::ADDIC); in ProcessInstruction()
806 TmpInst.setOpcode(PPC::ADDICo); in ProcessInstruction()
1004 TmpInst.setOpcode(PPC::ADDPCIS); in ProcessInstruction()
1102 Inst.setOpcode(PPC::MFSPR); in ProcessInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp682 MI.setOpcode(Mips::BOVC); in DecodeAddiGroupBranch()
685 MI.setOpcode(Mips::BEQC); in DecodeAddiGroupBranch()
755 MI.setOpcode(Mips::BNVC); in DecodeDaddiGroupBranch()
758 MI.setOpcode(Mips::BNEC); in DecodeDaddiGroupBranch()
909 MI.setOpcode(Mips::BLEZC); in DecodeBlezlGroupBranch()
911 MI.setOpcode(Mips::BGEZC); in DecodeBlezlGroupBranch()
914 MI.setOpcode(Mips::BGEC); in DecodeBlezlGroupBranch()
957 MI.setOpcode(Mips::BLTC); in DecodeBgtzlGroupBranch()
995 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
1091 MI.setOpcode(Mips::DEXT); in DecodeDEXT()
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/freebsd-12.1/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2000 Inst.setOpcode(ARM::CPS3p); in DecodeCPSInstruction()
2005 Inst.setOpcode(ARM::CPS2p); in DecodeCPSInstruction()
2010 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction()
2015 Inst.setOpcode(ARM::CPS1p); in DecodeCPSInstruction()
2040 Inst.setOpcode(ARM::t2CPS3p); in DecodeT2CPSInstruction()
2045 Inst.setOpcode(ARM::t2CPS2p); in DecodeT2CPSInstruction()
2050 Inst.setOpcode(ARM::t2CPS1p); in DecodeT2CPSInstruction()
2058 Inst.setOpcode(ARM::t2HINT); in DecodeT2CPSInstruction()
2187 Inst.setOpcode(ARM::SETPAN); in DecodeSETPANInstruction()
2294 Inst.setOpcode(ARM::BLXi); in DecodeBranchImmInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp664 FMov.setOpcode(AArch64::FMOVWHr); in EmitFMov0()
669 FMov.setOpcode(AArch64::FMOVWSr); in EmitFMov0()
674 FMov.setOpcode(AArch64::FMOVXDr); in EmitFMov0()
719 MovZ.setOpcode(AArch64::MOVZXi); in EmitInstruction()
726 MovK.setOpcode(AArch64::MOVKXi); in EmitInstruction()
778 TmpInst.setOpcode(AArch64::BR); in EmitInstruction()
787 TmpInst.setOpcode(AArch64::B); in EmitInstruction()
810 Adrp.setOpcode(AArch64::ADRP); in EmitInstruction()
816 Ldr.setOpcode(AArch64::LDRXui); in EmitInstruction()
824 Add.setOpcode(AArch64::ADDXri); in EmitInstruction()
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H A DAArch64MCInstLower.cpp296 OutMI.setOpcode(MI->getOpcode()); in Lower()
307 OutMI.setOpcode(AArch64::RET); in Lower()
312 OutMI.setOpcode(AArch64::RET); in Lower()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86MCInstLower.cpp312 Inst.setOpcode(Opcode); in SimplifyShortImmForm()
340 Inst.setOpcode(NewOpcode); in SimplifyMOVSX()
391 Inst.setOpcode(Opcode); in SimplifyShortMoveForm()
488 OutMI.setOpcode(NewOpc); in Lower()
502 OutMI.setOpcode(NewOpc); in Lower()
517 OutMI.setOpcode(Opcode); in Lower()
566 OutMI.setOpcode(Opcode); in Lower()
955 MI.setOpcode(Opcode); in LowerFAULTING_OP()
990 MCI.setOpcode(Opcode); in LowerPATCHABLE_OP()
1323 Ret.setOpcode(OpCode); in LowerPATCHABLE_RET()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.cpp100 Res.setOpcode(RISCV::BEQ); in relaxInstruction()
107 Res.setOpcode(RISCV::BNE); in relaxInstruction()
114 Res.setOpcode(RISCV::JAL); in relaxInstruction()
120 Res.setOpcode(RISCV::JAL); in relaxInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp176 MI.setOpcode(Hexagon::BUNDLE); in getInstruction()
205 MI.setOpcode(Hexagon::S6_allocframe_to_raw); in remapInstruction()
213 MI.setOpcode(L6_deallocframe_map_to_raw); in remapInstruction()
221 MI.setOpcode(L6_return_map_to_raw); in remapInstruction()
229 MI.setOpcode(L4_return_map_to_raw_t); in remapInstruction()
237 MI.setOpcode(L4_return_map_to_raw_f); in remapInstruction()
245 MI.setOpcode(L4_return_map_to_raw_tnew_pt); in remapInstruction()
253 MI.setOpcode(L4_return_map_to_raw_fnew_pt); in remapInstruction()
261 MI.setOpcode(L4_return_map_to_raw_tnew_pnt); in remapInstruction()
269 MI.setOpcode(L4_return_map_to_raw_fnew_pnt); in remapInstruction()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp230 ITInst.setOpcode(ARM::t2IT); in flushPendingInstructions()
7178 TmpInst.setOpcode(Opcode); in processInstruction()
7196 TmpInst.setOpcode(Opcode); in processInstruction()
7214 TmpInst.setOpcode(ARM::ADR); in processInstruction()
8435 TmpInst.setOpcode(NewOpc); in processInstruction()
8470 TmpInst.setOpcode(newOpc); in processInstruction()
8523 TmpInst.setOpcode(newOpc); in processInstruction()
8585 TmpInst.setOpcode(Opc); in processInstruction()
8777 Inst.setOpcode(ARM::tBcc); in processInstruction()
8791 Inst.setOpcode(ARM::t2B); in processInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.cpp122 TmpInst0.setOpcode(Mips::JALR64); in emitPseudoIndirectBranch()
127 TmpInst0.setOpcode(Mips::JRC16_MMR6); in emitPseudoIndirectBranch()
129 TmpInst0.setOpcode(Mips::JALR); in emitPseudoIndirectBranch()
134 TmpInst0.setOpcode(Mips::JR_MM); in emitPseudoIndirectBranch()
137 TmpInst0.setOpcode(Mips::JR); in emitPseudoIndirectBranch()
851 I.setOpcode(Mips::JAL); in EmitJal()
860 I.setOpcode(Opcode); in EmitInstrReg()
879 I.setOpcode(Opcode); in EmitInstrRegReg()
889 I.setOpcode(Opcode); in EmitInstrRegRegReg()
H A DMipsMCInstLower.cpp219 OutMI.setOpcode(Mips::LUi); in lowerLongBranchLUi()
257 OutMI.setOpcode(Opcode); in lowerLongBranchADDiu()
322 OutMI.setOpcode(MI->getOpcode()); in Lower()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsTargetStreamer.cpp149 TmpInst.setOpcode(Opcode); in emitR()
158 TmpInst.setOpcode(Opcode); in emitRX()
178 TmpInst.setOpcode(Opcode); in emitII()
189 TmpInst.setOpcode(Opcode); in emitRRX()
214 TmpInst.setOpcode(Opcode); in emitRRIII()
1138 TmpInst.setOpcode(Mips::LUi); in emitDirectiveCpLoad()
1150 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
1163 TmpInst.setOpcode(Mips::ADDu); in emitDirectiveCpLoad()
1261 Inst.setOpcode(Mips::OR); in emitDirectiveCpreturn()
1266 Inst.setOpcode(Mips::LD); in emitDirectiveCpreturn()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp38 NopInst.setOpcode(ARM::HINT); in getNoop()
43 NopInst.setOpcode(ARM::MOVr); in getNoop()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCAsmPrinter.cpp611 TmpInst.setOpcode(PPC::LWZ); in EmitInstruction()
628 TmpInst.setOpcode(PPC::ADD4); in EmitInstruction()
642 TmpInst.setOpcode(PPC::LWZ); in EmitInstruction()
686 TmpInst.setOpcode(PPC::LD); in EmitInstruction()
719 TmpInst.setOpcode(PPC::ADDIS8); in EmitInstruction()
765 TmpInst.setOpcode(PPC::LD); in EmitInstruction()
808 TmpInst.setOpcode(PPC::ADDI8); in EmitInstruction()
852 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); in EmitInstruction()
1136 RetInst.setOpcode(RetOpcode); in EmitInstruction()
1186 RetInst.setOpcode(PPC::BLR8); in EmitInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUMCInstLower.cpp177 OutMI.setOpcode(TII->pseudoToMCOpcode(AMDGPU::S_SWAPPC_B64)); in lower()
196 OutMI.setOpcode(MCOpcode); in lower()
364 OutMI.setOpcode(MI->getOpcode()); in lower()
/freebsd-12.1/contrib/llvm/lib/Target/X86/AsmParser/
H A DX86AsmInstrumentation.cpp250 Inst.setOpcode(Size == 32 ? X86::LEA32r : X86::LEA64r); in EmitLEA()
650 Inst.setOpcode(X86::MOV8rm); in InstrumentMemOperandSmall()
723 Inst.setOpcode(X86::CMP8mi); in InstrumentMemOperandLarge()
726 Inst.setOpcode(X86::CMP16mi); in InstrumentMemOperandLarge()
924 Inst.setOpcode(X86::MOV8rm); in InstrumentMemOperandSmall()
997 Inst.setOpcode(X86::CMP8mi); in InstrumentMemOperandLarge()
1000 Inst.setOpcode(X86::CMP16mi); in InstrumentMemOperandLarge()
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCInstBuilder.h28 Inst.setOpcode(Opcode); in MCInstBuilder()
/freebsd-12.1/contrib/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp481 mcInst.setOpcode(NewOpc); in translateImmediate()
523 mcInst.setOpcode(NewOpc); in translateImmediate()
652 mcInst.setOpcode(NewOpc); in translateImmediate()
1017 mcInst.setOpcode(insn.instructionID); in translateInstruction()
1023 mcInst.setOpcode(X86::XRELEASE_PREFIX); in translateInstruction()
1025 mcInst.setOpcode(X86::XACQUIRE_PREFIX); in translateInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFMCInstLower.cpp49 OutMI.setOpcode(MI->getOpcode()); in Lower()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp111 CallInst.setOpcode(SP::CALL); in EmitCall()
121 SETHIInst.setOpcode(SP::SETHIi); in EmitSETHI()
132 Inst.setOpcode(Opcode); in EmitBinary()

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