Searched refs:getStackRegister (Results 1 – 14 of 14) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonRegisterInfo.h | 72 unsigned getStackRegister() const;
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| H A D | HexagonRegisterInfo.cpp | 295 return getStackRegister(); in getFrameRegister() 304 unsigned HexagonRegisterInfo::getStackRegister() const { in getStackRegister() function in HexagonRegisterInfo
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| H A D | HexagonFrameLowering.cpp | 608 unsigned SP = HRI.getStackRegister(); in insertPrologueInBlock() 652 unsigned SP = HRI.getStackRegister(); in insertEpilogueInBlock() 751 unsigned SP = HRI.getStackRegister(); in insertAllocframe() 762 unsigned SP = HRI.getStackRegister(); in insertAllocframe() 1123 unsigned SP = HRI.getStackRegister(); in getFrameIndexReference()
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| H A D | HexagonVLIWPacketizer.cpp | 302 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent() 1562 if (I.getOperand(0).getReg() == HRI->getStackRegister()) { in isLegalToPacketizeTogether()
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| H A D | HexagonInstrInfo.cpp | 3700 HRI.getStackRegister() == SrcReg && in getDuplexCandidateGroup() 3754 HRI.getStackRegister() == SrcReg && in getDuplexCandidateGroup() 3815 HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() && in getDuplexCandidateGroup() 3856 HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() && in getDuplexCandidateGroup() 3905 HRI.getStackRegister() == SrcReg && MI.getOperand(2).isImm() && in getDuplexCandidateGroup()
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| H A D | HexagonISelLowering.cpp | 376 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT); in LowerCall() 1236 setStackPointerRegisterToSaveRestore(HRI.getStackRegister()); in HexagonTargetLowering()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 134 unsigned getStackRegister() const { return StackPtr; } in getStackRegister() function
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| H A D | X86CallFrameOptimization.cpp | 335 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction() 377 unsigned StackPtr = RegInfo.getStackRegister(); in collectCallInfo()
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| H A D | X86WinAllocaExpander.cpp | 287 StackPtr = TRI->getStackRegister(); in runOnMachineFunction()
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| H A D | X86ExpandPseudo.cpp | 279 unsigned StackPtr = TRI->getStackRegister(); in ExpandMI()
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| H A D | X86CallLowering.cpp | 112 MIRBuilder.buildCopy(SPReg, STI.getRegisterInfo()->getStackRegister()); in getStackAddress()
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| H A D | X86FrameLowering.cpp | 49 StackPtr = TRI->getStackRegister(); in X86FrameLowering() 1542 assert(Offset >= 0 && SPReg == TRI->getStackRegister()); in getPSPSlotOffsetFromSP() 1761 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister(); in getFrameIndexReference() 1839 FrameReg = TRI->getStackRegister(); in getFrameIndexReferenceSP()
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| H A D | X86FastISel.cpp | 3427 AM.Base.Reg = RegInfo->getStackRegister(); in fastLowerCall()
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| H A D | X86ISelLowering.cpp | 124 setStackPointerRegisterToSaveRestore(RegInfo->getStackRegister()); in X86TargetLowering() 3824 StackPtr = DAG.getCopyFromReg(Chain, dl, RegInfo->getStackRegister(), in LowerCall() 3938 StackPtr = DAG.getCopyFromReg(Chain, dl, RegInfo->getStackRegister(), in LowerCall() 21042 unsigned SPReg = RegInfo->getStackRegister(); in LowerDYNAMIC_STACKALLOC() 29410 unsigned SP = RegInfo->getStackRegister(); in emitEHSjLjLongJmp()
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