Searched refs:idle (Results 1 – 13 of 13) sorted by relevance
80 static const uint32_t idle[UINT8_MAX + 1]; variable167 transition = ctx->idle; in acl_start_next_trie()168 parms[n].data = (const uint8_t *)idle; in acl_start_next_trie()169 parms[n].data_index = idle; in acl_start_next_trie()
181 uint64_t idle; member
526 ctx->idle = node_array[RTE_ACL_DFA_SIZE]; in rte_acl_gen()
289 static uint64_t idle; variable296 idle = 0; in reset_count()353 idle++; in measure_rxtx()392 idle++; in measure_rxonly()429 idle++; in measure_txonly()535 count, drop, idle); in main_loop()
58 They allow software to put an Intel core into a low power idle state from which it is possible to e…59 …is a tradeoff between the power consumed in the idle state and the time required to wake up from t…203 an idle counter begins incrementing for each successive zero poll.208 The algorithm has the following sleeping behavior depending on the idle counter:210 * If idle count less than 100, the counter value is used as a microsecond sleep value through rte…213 * If idle count is between 100 and 999, a fixed sleep interval of 100 μs is used.216 * If idle count is greater than 1000, a fixed sleep value of 1 ms is used until the next timer ex…
273 Third do-while loop is the idle job (idle stats counter). Its only purpose is monitoring if any job…
86 While this may mean a number of buffers may sit idle on some core's cache,
19 post analysis information like CPU idle time, etc that would otherwise be
460 To ease the idle polling with tiny throughput, it's useful to pause the polling and wait until the …642 However, alternately it is possible to utilize the idle cycles available to take advantage of
526 as the number of CPU core execution units that are active (rather than idle or stalled due to data …
270 TX idle period for entering K1 should be 128 ns.271 Minimum TX idle period in K1 should be 256 ns.
207 resources. From the kernel point of view the iomem region looks like idle
270 * Added CPU utilization measurement and idle cycle rate computation.