| /wasmtime-44.0.1/cranelift/isle/isle/isle_examples/pass/ |
| H A D | let.isle | 1 (type A (enum (Add (x u32) (y u32)) (Sub (x u32) (y u32))))
4 (decl Sub (u32 u32) u32)
5 (extern constructor Sub sub)
18 (Lower (A.Sub x y))
19 (let ((z u32 (Sub x y)))
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| H A D | test3.isle | 26 (Sub (a Reg) (b Reg))))
63 (MachInst.Sub (UseInput ra) (UseInput rb)))
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| /wasmtime-44.0.1/cranelift/codegen/src/ir/ |
| H A D | atomic_rmw_op.rs | 14 Sub, enumerator
40 AtomicRmwOp::Sub, in all()
58 AtomicRmwOp::Sub => "sub", in fmt()
78 "sub" => Ok(AtomicRmwOp::Sub), in from_str()
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| /wasmtime-44.0.1/cranelift/codegen/src/machinst/ |
| H A D | helpers.rs | 4 use core::ops::{Add, BitAnd, Not, Sub};
17 + Sub<N, Output = N> in align_to()
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| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/ |
| H A D | broken_fits_in_32_band.isle | 13 (Sub #x01)
33 (Sub)
45 ;; Sub setting flags
|
| H A D | broken_fits_in_32_bor.isle | 13 (Sub #x01)
33 (Sub)
45 ;; Sub setting flags
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/isub/ |
| H A D | broken_shift.isle | 23 (Sub #x01)
40 (Sub)
73 (rule (sub_shift ty x y z) (alu_rrr_shift (ALUOp.Sub) ty x y z))
|
| H A D | broken_imm12.isle | 15 (Sub)
30 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | broken_base_case.isle | 11 (Sub)
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/shifts/ |
| H A D | broken_ishl_to_do_shift_64.isle | 12 (Sub #x01)
32 (Sub)
44 ;; Sub setting flags
|
| H A D | broken_sshr_to_do_shift_fits_in_32.isle | 12 (Sub #x01)
32 (Sub)
44 ;; Sub setting flags
|
| H A D | broken_do_shift_32.isle | 8 (Sub #x01)
28 (Sub)
40 ;; Sub setting flags
|
| H A D | broken_ushr_to_do_shift_fits_in_32.isle | 12 (Sub #x01)
32 (Sub)
44 ;; Sub setting flags
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/iadd/ |
| H A D | updated_iadd_imm12neg_right.isle | 14 (Sub)
28 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | updated_iadd_imm12neg_left.isle | 14 (Sub)
28 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/iadd/ |
| H A D | broken_imm12neg2.isle | 15 (Sub)
31 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | broken_imm12neg.isle | 15 (Sub)
32 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | broken_shift.isle | 23 (Sub #x01)
40 (Sub)
|
| H A D | broken_shift2.isle | 23 (Sub #x01)
40 (Sub)
|
| /wasmtime-44.0.1/crates/wasmtime/src/runtime/vm/ |
| H A D | byte_count.rs | 108 .ok_or_else(|| ByteCountOutOfBounds(ByteCountOutOfBoundsKind::Sub)) in checked_sub()
256 Sub, enumerator
270 ByteCountOutOfBoundsKind::Sub => f.write_str("byte count underflow during subtraction"), in fmt()
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/clz/ |
| H A D | broken_clz16.isle | 19 (Sub)
47 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | broken_clz8.isle | 19 (Sub)
47 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| /wasmtime-44.0.1/cranelift/isle/veri/veri_engine/examples/broken/cls/ |
| H A D | broken_cls16.isle | 19 (Sub)
47 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| H A D | broken_cls8.isle | 19 (Sub)
47 (rule (sub_imm ty x y) (alu_rr_imm12 (ALUOp.Sub) ty x y))
|
| /wasmtime-44.0.1/cranelift/bitset/src/ |
| H A D | scalar.rs | 4 use core::ops::{Add, BitAnd, BitOr, Not, Shl, Shr, Sub};
540 + Sub<Output = Self>
|