Home
last modified time | relevance | path

Searched refs:tmp2 (Results 1 – 25 of 1400) sorted by relevance

12345678910>>...56

/llvm-project-15.0.7/libc/AOR_v20.02/string/aarch64/
H A Dstrcpy.S36 #define tmp2 x9 macro
113 rev tmp2, data1
115 orr tmp2, tmp2, #REP8_7f
138 mov tmp2, #56
140 sub pos, tmp2, pos
160 mov tmp2, #56
256 csetm tmp2, ne
258 lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
260 lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
286 rev tmp2, data1
[all …]
H A Dstrlen-mte.S27 #define tmp2 x5 macro
82 orr tmp2, data1, REP8_7f
95 neg tmp2, tmp2
98 add tmp3, tmp2, 8
99 csel len, tmp2, tmp3, cc
105 orr tmp2, data2, REP8_7f
123 orr tmp2, tmp1, tmp3
129 orr tmp2, tmp1, tmp3
135 orr tmp2, data1, REP8_7f
159 add tmp2, len, 8
[all …]
H A Dstrlen.S31 #define tmp2 x5 macro
92 orr tmp2, data1, REP8_7f
121 orr tmp2, tmp1, tmp3
127 orr tmp2, tmp1, tmp3
133 orr tmp2, data1, REP8_7f
150 orr tmp2, data1, REP8_7f
151 bic has_nul1, tmp1, tmp2
157 add tmp2, len, 8
159 csel len, len, tmp2, cc
166 orr tmp2, data1, REP8_7f
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvshift.ll44 ret <8 x i8> %tmp2
52 ret <4 x i16> %tmp2
60 ret <2 x i32> %tmp2
68 ret <1 x i64> %tmp2
112 ret <16 x i8> %tmp2
120 ret <8 x i16> %tmp2
128 ret <4 x i32> %tmp2
136 ret <2 x i64> %tmp2
184 ret <8 x i8> %tmp2
192 ret <4 x i16> %tmp2
[all …]
H A Dvcnt.ll9 ret <8 x i8> %tmp2
17 ret <16 x i8> %tmp2
28 ret <8 x i8> %tmp2
36 ret <4 x i16> %tmp2
44 ret <2 x i32> %tmp2
51 ret <1 x i64> %tmp2
59 ret <16 x i8> %tmp2
67 ret <8 x i16> %tmp2
75 ret <4 x i32> %tmp2
82 ret <2 x i64> %tmp2
[all …]
H A Dvneg.ll8 ret <8 x i8> %tmp2
16 ret <4 x i16> %tmp2
24 ret <2 x i32> %tmp2
32 ret <2 x float> %tmp2
40 ret <16 x i8> %tmp2
48 ret <8 x i16> %tmp2
56 ret <4 x i32> %tmp2
72 ret <8 x i8> %tmp2
80 ret <4 x i16> %tmp2
88 ret <2 x i32> %tmp2
[all …]
H A Dvshl.ll155 ret <8 x i8> %tmp2
163 ret <4 x i16> %tmp2
171 ret <2 x i32> %tmp2
179 ret <1 x i64> %tmp2
187 ret <16 x i8> %tmp2
195 ret <8 x i16> %tmp2
203 ret <4 x i32> %tmp2
211 ret <2 x i64> %tmp2
221 ret <8 x i8> %tmp2
229 ret <4 x i16> %tmp2
[all …]
H A Dvqshl.ll152 ret <8 x i8> %tmp2
160 ret <4 x i16> %tmp2
168 ret <2 x i32> %tmp2
176 ret <1 x i64> %tmp2
184 ret <8 x i8> %tmp2
192 ret <4 x i16> %tmp2
200 ret <2 x i32> %tmp2
208 ret <1 x i64> %tmp2
216 ret <8 x i8> %tmp2
224 ret <4 x i16> %tmp2
[all …]
H A Dvget_lane.ll10 %tmp3 = sext i8 %tmp2 to i32
19 %tmp3 = sext i16 %tmp2 to i32
28 %tmp3 = zext i8 %tmp2 to i32
37 %tmp3 = zext i16 %tmp2 to i32
56 %tmp3 = sext i8 %tmp2 to i32
166 ret <8 x i8> %tmp2
174 ret <4 x i16> %tmp2
182 ret <2 x i32> %tmp2
190 ret <16 x i8> %tmp2
198 ret <8 x i16> %tmp2
[all …]
H A Dvcvt-v8.ll7 ret <4 x i32> %tmp2
15 ret <2 x i32> %tmp2
23 ret <4 x i32> %tmp2
31 ret <2 x i32> %tmp2
39 ret <4 x i32> %tmp2
47 ret <2 x i32> %tmp2
55 ret <4 x i32> %tmp2
63 ret <2 x i32> %tmp2
71 ret <4 x i32> %tmp2
79 ret <2 x i32> %tmp2
[all …]
H A Dneon-vqaddsub-upgrade.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
34 %tmp2 = load <1 x i64>, <1 x i64>* %B
43 %tmp2 = load <8 x i8>, <8 x i8>* %B
52 %tmp2 = load <4 x i16>, <4 x i16>* %B
61 %tmp2 = load <2 x i32>, <2 x i32>* %B
70 %tmp2 = load <1 x i64>, <1 x i64>* %B
79 %tmp2 = load <16 x i8>, <16 x i8>* %B
152 %tmp2 = load <8 x i8>, <8 x i8>* %B
[all …]
H A Dvsra.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
17 %tmp2 = load <4 x i16>, <4 x i16>* %B
27 %tmp2 = load <2 x i32>, <2 x i32>* %B
37 %tmp2 = load <1 x i64>, <1 x i64>* %B
47 %tmp2 = load <16 x i8>, <16 x i8>* %B
57 %tmp2 = load <8 x i16>, <8 x i16>* %B
67 %tmp2 = load <4 x i32>, <4 x i32>* %B
77 %tmp2 = load <2 x i64>, <2 x i64>* %B
87 %tmp2 = load <8 x i8>, <8 x i8>* %B
167 %tmp2 = load <8 x i8>, <8 x i8>* %B
[all …]
H A Dvtbl.ll11 %tmp2 = load <8 x i8>, <8 x i8>* %B
21 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
22 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
32 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
33 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
34 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
44 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
45 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
46 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
47 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
[all …]
H A Dvhadd.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
34 %tmp2 = load <8 x i8>, <8 x i8>* %B
43 %tmp2 = load <4 x i16>, <4 x i16>* %B
52 %tmp2 = load <2 x i32>, <2 x i32>* %B
61 %tmp2 = load <16 x i8>, <16 x i8>* %B
70 %tmp2 = load <8 x i16>, <8 x i16>* %B
79 %tmp2 = load <4 x i32>, <4 x i32>* %B
131 %tmp2 = load <8 x i8>, <8 x i8>* %B
[all …]
H A Dvrec.ll8 ret <2 x i32> %tmp2
16 ret <4 x i32> %tmp2
24 ret <2 x float> %tmp2
32 ret <4 x float> %tmp2
45 %tmp2 = load <2 x float>, <2 x float>* %B
54 %tmp2 = load <4 x float>, <4 x float>* %B
67 ret <2 x i32> %tmp2
75 ret <4 x i32> %tmp2
83 ret <2 x float> %tmp2
91 ret <4 x float> %tmp2
[all …]
H A Dvabd.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
16 %tmp2 = load <4 x i16>, <4 x i16>* %B
25 %tmp2 = load <2 x i32>, <2 x i32>* %B
34 %tmp2 = load <8 x i8>, <8 x i8>* %B
43 %tmp2 = load <4 x i16>, <4 x i16>* %B
52 %tmp2 = load <2 x i32>, <2 x i32>* %B
70 %tmp2 = load <16 x i8>, <16 x i8>* %B
79 %tmp2 = load <8 x i16>, <8 x i16>* %B
88 %tmp2 = load <4 x i32>, <4 x i32>* %B
153 %tmp2 = load <8 x i8>, <8 x i8>* %B
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dotherops.ll8 ; CHECK-NEXT: ret i32 %tmp2
11 %tmp2 = mul i32 %tmp1, 12
12 ret i32 %tmp2
18 ; CHECK-NEXT: ret i32 %tmp2
21 %tmp2 = and i32 %tmp1, 14
22 ret i32 %tmp2
28 ; CHECK-NEXT: ret i32 %tmp2
31 %tmp2 = or i32 %tmp1, 14
32 ret i32 %tmp2
40 %tmp2 = xor i32 %tmp1, 12
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-neon-scalar-by-elem-mul.ll8 ret float %tmp2;
16 ret float %tmp2;
25 ret float %tmp2;
33 ret float %tmp2;
42 ret double %tmp2;
52 ret double %tmp2;
61 ret double %tmp2;
71 ret float %tmp2;
79 ret float %tmp2;
87 ret float %tmp2;
[all …]
H A Dneon-scalar-by-elem-fma.ll15 ret float %tmp2
23 ret float %tmp2
31 ret float %tmp2
39 ret double %tmp2
47 ret double %tmp2
55 ret double %tmp2
118 ret float %tmp2
126 ret float %tmp2
134 ret float %tmp2
142 ret double %tmp2
[all …]
H A Dneon-mla-mls.ll13 ret <8 x i8> %tmp2
24 ret <16 x i8> %tmp2
35 ret <4 x i16> %tmp2
46 ret <8 x i16> %tmp2
57 ret <2 x i32> %tmp2
68 ret <4 x i32> %tmp2
79 ret <8 x i8> %tmp2
90 ret <16 x i8> %tmp2
101 ret <4 x i16> %tmp2
112 ret <8 x i16> %tmp2
[all …]
H A Darm64-vsra.ll7 %tmp2 = load <8 x i8>, <8 x i8>* %B
17 %tmp2 = load <4 x i16>, <4 x i16>* %B
27 %tmp2 = load <2 x i32>, <2 x i32>* %B
37 %tmp2 = load <16 x i8>, <16 x i8>* %B
47 %tmp2 = load <8 x i16>, <8 x i16>* %B
57 %tmp2 = load <4 x i32>, <4 x i32>* %B
67 %tmp2 = load <2 x i64>, <2 x i64>* %B
77 %tmp2 = load <8 x i8>, <8 x i8>* %B
87 %tmp2 = load <4 x i16>, <4 x i16>* %B
97 %tmp2 = load <2 x i32>, <2 x i32>* %B
[all …]
/llvm-project-15.0.7/libc/AOR_v20.02/string/arm/
H A Dmemcpy.S231 rsbs tmp2, tmp2, #0
235 lsls tmp2, tmp2, #2
252 subs tmp2, tmp2, #64
315 subs tmp2, tmp2, #64
398 subs tmp2, tmp2, #prefetch_lines * 64
422 add tmp2, tmp2, #prefetch_lines * 64
433 subs tmp2, tmp2, #64
455 subs tmp2, tmp2, #64
491 rsbs tmp2, tmp2, #0
495 lsls tmp2, tmp2, #2
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dlshr-shl-differentconstmask.ll15 %tmp2 = mul i32 %tmp1, 16
16 ret i32 %tmp2
29 %tmp2 = mul i32 %tmp1, 64
30 ret i32 %tmp2
45 %tmp2 = shl i32 %tmp1, 4
46 ret i32 %tmp2
60 ret i32 %tmp2
74 ret i32 %tmp2
88 ret i32 %tmp2
104 ret i32 %tmp2
[all …]
H A Dshl-lshr-differentconstmask.ll15 %tmp2 = udiv i32 %tmp1, 16
16 ret i32 %tmp2
29 %tmp2 = udiv i32 %tmp1, 64
30 ret i32 %tmp2
45 %tmp2 = lshr i32 %tmp1, 4
46 ret i32 %tmp2
60 ret i32 %tmp2
74 ret i32 %tmp2
88 ret i32 %tmp2
104 ret i32 %tmp2
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dthumb2-orr2.ll5 %tmp2 = or i32 %a, 187
6 ret i32 %tmp2
13 %tmp2 = or i32 %a, 11141290
14 ret i32 %tmp2
21 %tmp2 = or i32 %a, 3422604288
22 ret i32 %tmp2
29 %tmp2 = or i32 %a, 1145324612
30 ret i32 %tmp2
37 %tmp2 = or i32 %a, 1114112
38 ret i32 %tmp2

12345678910>>...56