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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dfixed-vectors-extload-truncstore.ll10 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
23 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
35 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
47 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
59 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
71 ; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu
83 ; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu
95 ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
107 ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
119 ; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
[all …]
H A Dfixed-vectors-extract-subvector.ll8 ; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
10 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
22 ; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e8, mf4, ta, mu
26 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
38 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
40 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
52 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
54 ; CHECK-NEXT: vsetivli zero, 2, e8, mf2, ta, mu
56 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
[all …]
H A Dfixed-vectors-vpgather.ll12 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
19 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
30 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
32 ; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
38 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
40 ; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
51 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
53 ; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
59 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
72 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
[all …]
H A Dvreductions-int.ll12 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
14 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
27 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
29 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
43 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
45 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
58 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
60 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
74 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
89 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
[all …]
H A Dfixed-vectors-i2fp.ll10 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
38 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
50 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
53 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
65 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
67 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
78 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
90 ; LMULMAX8-NEXT: vsetivli zero, 8, e32, m2, ta, mu
204 ; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, mu
[all …]
H A Dfixed-vectors-vpscatter.ll12 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
18 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
28 ; RV32-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
30 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
36 ; RV64-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
38 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
49 ; RV32-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
53 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
59 ; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
63 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
[all …]
H A Dfixed-vectors-reduction-fp.ll10 ; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu
23 ; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, mu
39 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
53 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
69 ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
83 ; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, mu
99 ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu
113 ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu
160 ; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, mu
162 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
[all …]
H A Dfixed-vectors-fp2i.ll10 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
38 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
50 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
61 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
72 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
84 ; LMULMAX8-NEXT: vsetivli zero, 8, e32, m2, ta, mu
206 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
220 ; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, mu
344 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
[all …]
H A Dfixed-vectors-bitcast.ll19 ; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, mu
26 ; ELEN32-NEXT: vsetvli zero, a0, e8, m2, ta, mu
37 ; CHECK-NEXT: vsetivli zero, 0, e8, mf8, ta, mu
43 ; ELEN32-NEXT: vsetivli zero, 0, e8, mf4, ta, mu
53 ; CHECK-NEXT: vsetivli zero, 0, e16, mf4, ta, mu
69 ; CHECK-NEXT: vsetivli zero, 0, e16, mf4, ta, mu
134 ; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, mu
142 ; RV64-NEXT: vsetivli zero, 0, e64, m1, ta, mu
172 ; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, mu
180 ; RV64-NEXT: vsetivli zero, 0, e64, m1, ta, mu
[all …]
H A Dfixed-vectors-extract.ll10 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu
12 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, mu
26 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
38 ; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
40 ; CHECK-NEXT: vsetivli zero, 1, e32, m1, ta, mu
52 ; RV32-NEXT: vsetivli zero, 2, e64, m1, ta, mu
55 ; RV32-NEXT: vsetivli zero, 1, e64, m1, ta, mu
63 ; RV64-NEXT: vsetivli zero, 2, e64, m1, ta, mu
116 ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu
[all …]
H A Dvpgather-sdnode.ll12 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
19 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
32 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
39 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
50 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
52 ; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu
58 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
60 ; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu
71 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
79 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
[all …]
H A Dfixed-vectors-reduction-int.ll10 ; CHECK-NEXT: vsetivli zero, 1, e8, mf8, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
40 ; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
56 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
72 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu
89 ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu
91 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
93 ; CHECK-NEXT: vsetvli zero, a1, e8, m2, ta, mu
108 ; CHECK-NEXT: vsetvli zero, a1, e8, m4, ta, mu
110 ; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, mu
[all …]
H A Dvpscatter-sdnode.ll12 ; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
18 ; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu
30 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
36 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
46 ; RV32-NEXT: vsetvli a1, zero, e8, mf4, ta, mu
48 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
54 ; RV64-NEXT: vsetvli a1, zero, e8, mf4, ta, mu
56 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
71 ; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
81 ; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu
[all …]
H A Dvreductions-fp-sdnode.ll12 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
14 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu
25 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
27 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu
40 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
42 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, mu
53 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
68 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
70 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, mu
81 ; CHECK-NEXT: vsetivli zero, 1, e16, m1, ta, mu
[all …]
H A Dfixed-vectors-fp-conv.ll10 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
27 ; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
40 ; LMULMAX8-NEXT: vsetivli zero, 8, e16, m1, ta, mu
48 ; LMULMAX1-NEXT: vsetivli zero, 8, e16, m1, ta, mu
50 ; LMULMAX1-NEXT: vsetivli zero, 4, e16, m1, ta, mu
68 ; LMULMAX8-NEXT: vsetivli zero, 8, e16, m1, ta, mu
78 ; LMULMAX1-NEXT: vsetivli zero, 8, e16, m1, ta, mu
86 ; LMULMAX1-NEXT: vsetivli zero, 4, e16, m1, ta, mu
119 ; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
[all …]
H A Dfixed-vectors-int-exttrunc.ll12 ; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
26 ; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, mu
40 ; LMULMAX8-NEXT: vsetivli zero, 8, e32, m2, ta, mu
48 ; LMULMAX2-NEXT: vsetivli zero, 8, e32, m2, ta, mu
56 ; LMULMAX1-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
58 ; LMULMAX1-NEXT: vsetivli zero, 4, e8, mf2, ta, mu
60 ; LMULMAX1-NEXT: vsetivli zero, 4, e32, m1, ta, mu
86 ; LMULMAX2-NEXT: vsetvli zero, a2, e8, m2, ta, mu
88 ; LMULMAX2-NEXT: vsetivli zero, 8, e8, m1, ta, mu
94 ; LMULMAX2-NEXT: vsetivli zero, 8, e8, m1, ta, mu
[all …]
H A Dfptosi-sat.ll22 ; CHECK32-NEXT: vsetvli a0, zero, e32, m1, ta, mu
42 ; CHECK64-NEXT: vsetvli a0, zero, e32, m1, ta, mu
68 ; CHECK32-NEXT: vsetvli a0, zero, e32, m2, ta, mu
88 ; CHECK64-NEXT: vsetvli a0, zero, e32, m2, ta, mu
114 ; CHECK32-NEXT: vsetvli a0, zero, e32, m4, ta, mu
134 ; CHECK64-NEXT: vsetvli a0, zero, e32, m4, ta, mu
162 ; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, mu
183 ; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, mu
342 ; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, mu
363 ; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, mu
[all …]
H A Dfixed-vectors-select-fp.ll10 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
13 ; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
24 ; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
27 ; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
38 ; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
52 ; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
66 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
80 ; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu
94 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu
108 ; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, mu
[all …]
H A Dfixed-vectors-masked-scatter.ll16 ; RV32V-NEXT: vsetivli zero, 1, e8, mf8, ta, mu
22 ; RV64-NEXT: vsetivli zero, 1, e8, mf8, ta, mu
54 ; RV32V-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
60 ; RV64-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
98 ; RV32V-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
105 ; RV64-NEXT: vsetivli zero, 2, e8, mf8, ta, mu
156 ; RV64-NEXT: vsetivli zero, 2, e16, mf4, ta, mu
286 ; RV32-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
292 ; RV64-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
346 ; RV32-NEXT: vsetivli zero, 4, e8, mf4, ta, mu
[all …]
H A Dvtruncs-sdnode.ll8 ; CHECK-NEXT: vsetvli a0, zero, e8, mf8, ta, mu
18 ; CHECK-NEXT: vsetvli a0, zero, e8, mf4, ta, mu
28 ; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, mu
38 ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, mu
49 ; CHECK-NEXT: vsetvli a0, zero, e8, m2, ta, mu
60 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu
72 ; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, mu
82 ; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, mu
104 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, mu
116 ; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, mu
[all …]
H A Dselect-fp.ll10 ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, mu
13 ; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
24 ; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, mu
38 ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, mu
52 ; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, mu
66 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, mu
80 ; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, mu
94 ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, mu
108 ; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, mu
122 ; CHECK-NEXT: vsetvli a1, zero, e8, m2, ta, mu
[all …]
H A Dfixed-vectors-fp-bitcast.ll12 ; CHECK-NEXT: vsetivli zero, 0, e16, mf4, ta, mu
22 ; CHECK-NEXT: vsetivli zero, 0, e16, mf4, ta, mu
32 ; CHECK-NEXT: vsetivli zero, 0, e32, mf2, ta, mu
42 ; CHECK-NEXT: vsetivli zero, 0, e32, mf2, ta, mu
52 ; CHECK-NEXT: vsetivli zero, 0, e32, mf2, ta, mu
62 ; CHECK-NEXT: vsetivli zero, 0, e32, mf2, ta, mu
73 ; RV32-FP-NEXT: vsetivli zero, 1, e64, m1, ta, mu
81 ; RV64-FP-NEXT: vsetivli zero, 0, e64, m1, ta, mu
129 ; CHECK-NEXT: vsetivli zero, 0, e64, m1, ta, mu
139 ; CHECK-NEXT: vsetivli zero, 0, e64, m1, ta, mu
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/rvv/
H A Dvsetvl.s48 vsetvli a2, a0, e32, m1, ta, ma
54 vsetvli a2, a0, e32, m2, ta, ma
60 vsetvli a2, a0, e32, m4, ta, ma
66 vsetvli a2, a0, e32, m8, ta, ma
72 vsetvli a2, a0, e32, mf2, ta, ma
78 vsetvli a2, a0, e32, mf4, ta, ma
84 vsetvli a2, a0, e32, mf8, ta, ma
90 vsetvli a2, a0, e32, m1, ta, ma
102 vsetvli a2, a0, e32, m1, ta, mu
145 vsetivli a2, 0, e32, m1, ta, ma
[all …]
/llvm-project-15.0.7/flang/test/Lower/forall/
H A Darray-pointer.f9024 type ta type
26 end type ta
475 type(ta) :: x(:)
488 type(ta) :: x(:)
547 type(ta) :: x(:)
687 type(ta) x(:)
732 type(ta) x(:)
784 type(ta) x(:)
793 type(ta) x(:)
802 type(ta) x(:)
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Das-needed-in-regular.s4 # RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux - -o %ta.o
5 # RUN: ld.lld %ta.o --shared --soname=a.so -o %ta.so
8 # RUN: ld.lld %t.o --as-needed %ta.so -o %t
10 # RUN: ld.lld %t.o --as-needed %ta.so --gc-sections -o %t
13 # The order of %ta.so and %t.o does not matter.
15 # RUN: ld.lld --as-needed %ta.so %t.o -o %t
17 # RUN: ld.lld --as-needed %ta.so %t.o --gc-sections -o %t

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