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Searched refs:stlex (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dldaex-stlex.ll70 %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* elementtype(i8) %addr)
79 %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* elementtype(i16) %addr)
84 ; CHECK: stlex r0, r1, [r2]
86 %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* elementtype(i32) %addr)
90 declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
91 declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
92 declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
H A Dldstrex-m.ll61 ; CHECK-V8: stlex
H A Datomic-ops-m33.ll62 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
H A Datomic-ops-v8.ll70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
1118 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
/llvm-project-15.0.7/llvm/test/Bitcode/
H A Darm-intrinsics.ll11 ; CHECK: call i32 @llvm.arm.stlex.p0i32(i32 0, i32* elementtype(i32)
12 %c2 = call i32 @llvm.arm.stlex.p0i32(i32 0, i32* %p)
18 declare i32 @llvm.arm.stlex.p0i32(i32, i32*)
/llvm-project-15.0.7/llvm/test/Verifier/
H A Darm-intrinsics.ll12 %c2 = call i32 @llvm.arm.stlex.p0i32(i32 0, i32* %p)
18 declare i32 @llvm.arm.stlex.p0i32(i32, i32*)
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dload-store-acquire-release-v8.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
H A Dload-store-acquire-release-v8-thumb.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
H A Dthumbv8m.s130 stlex r1, r2, [r3] label
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dload-store-acquire-release-v8-thumb.txt18 # CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
H A Dload-store-acquire-release-v8.txt17 # CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
/llvm-project-15.0.7/llvm/test/Transforms/AtomicExpand/ARM/
H A Datomic-expansion-v8.ll30 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* elementtype(i16) …
102 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* elementtype(i8) %p…
147 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* elementtype(i16)…
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td3745 "stlex", "\t$Rd, $Rt, $addr", "",
H A DARMInstrInfo.td5285 NoItinerary, "stlex", "\t$Rd, $Rt, $addr",