| /llvm-project-15.0.7/libunwind/src/ |
| H A D | CompactUnwinder.hpp | 540 registers.setRegister(UNW_AARCH64_X19, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 542 registers.setRegister(UNW_AARCH64_X20, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 546 registers.setRegister(UNW_AARCH64_X21, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 548 registers.setRegister(UNW_AARCH64_X22, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 552 registers.setRegister(UNW_AARCH64_X23, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 554 registers.setRegister(UNW_AARCH64_X24, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 558 registers.setRegister(UNW_AARCH64_X25, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 560 registers.setRegister(UNW_AARCH64_X26, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 564 registers.setRegister(UNW_AARCH64_X27, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() 566 registers.setRegister(UNW_AARCH64_X28, addressSpace.get64(savedRegisterLoc)); in stepWithCompactEncodingFrameless() [all …]
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| H A D | DwarfParser.hpp | 106 void setRegister(uint64_t reg, RegisterSavedWhere newLocation, in setRegister() function 494 results->setRegister(reg, kRegisterInCFA, offset, initialState); in parseFDEInstructions() 547 results->setRegister(reg, kRegisterInRegister, (int64_t)reg2, in parseFDEInstructions() 625 results->setRegister(reg, kRegisterAtExpression, (int64_t)p, in parseFDEInstructions() 644 results->setRegister(reg, kRegisterInCFA, offset, initialState); in parseFDEInstructions() 708 results->setRegister(reg, kRegisterIsExpression, (int64_t)p, in parseFDEInstructions() 732 results->setRegister(reg, kRegisterInCFA, -offset, initialState); in parseFDEInstructions() 760 results->setRegister(reg, kRegisterInRegister, in parseFDEInstructions() 766 results->setRegister(reg, kRegisterInCFA, in parseFDEInstructions() 781 results->setRegister( in parseFDEInstructions() [all …]
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| H A D | Registers.hpp | 64 void setRegister(int num, uint32_t value); 282 void setRegister(int num, uint64_t value); 601 void setRegister(int num, uint32_t value); 1171 void setRegister(int num, uint64_t value); 1820 void setRegister(int num, uint64_t value); 2109 void setRegister(int num, uint32_t value); 2614 void setRegister(int num, uint32_t value); 2813 void setRegister(int num, uint32_t value); 3142 void setRegister(int num, uint64_t value); 3625 void setRegister(int num, uint64_t value); [all …]
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| H A D | DwarfInstructions.hpp | 237 newRegisters.setRegister( in stepWithDwarf() 329 newRegisters.setRegister(UNW_PPC64_R2, r2); in stepWithDwarf()
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| H A D | UnwindCursor.hpp | 1321 _registers.setRegister(regNum, (typename A::pint_t)value); in setReg() 2323 newRegisters.setRegister(i, sigContext->sc_jmpbuf.jmp_context.gpr[i]); in stepWithTBTable() 2366 newRegisters.setRegister(32 - TBTable->tb.gpr_saved + i, GPRegs[i]); in stepWithTBTable() 2449 newRegisters.setRegister(2, reinterpret_cast<pint_t *>(lastStack)[5]); in stepWithTBTable() 2678 _registers.setRegister(UNW_AARCH64_X0 + i, value); in stepThroughSigReturn() 2768 _registers.setRegister(UNW_S390X_R0 + i, value); in stepThroughSigReturn()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.cpp | 63 setRegister(Key->getZExtValue(), Val->getZExtValue()); in readFromIR() 81 setRegister(Data[I * 2], Data[I * 2 + 1]); in setFromLegacyBlob() 139 setRegister(getRsrc1Reg(CC), Val); in setRsrc1() 145 setRegister(getRsrc1Reg(CC) + 1, Val); in setRsrc2() 151 setRegister(PALMD::R_A1B3_SPI_PS_INPUT_ENA, Val); in setSpiPsInputEna() 157 setRegister(PALMD::R_A1B4_SPI_PS_INPUT_ADDR, Val); in setSpiPsInputAddr() 174 void AMDGPUPALMetadata::setRegister(unsigned Reg, unsigned Val) { in setRegister() function in AMDGPUPALMetadata 205 setRegister(NumUsedVgprsKey, Val); in setNumUsedVgprs() 226 setRegister(NumUsedSgprsKey, Val); in setNumUsedSgprs() 237 setRegister(getScratchSizeKey(CC), Val); in setScratchSize() [all …]
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| H A D | AMDGPUPALMetadata.h | 62 void setRegister(unsigned Reg, unsigned Val);
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64CleanupLocalDynamicTLSPass.cpp | 79 I = setRegister(*I, &TLSBaseAddrReg); in VisitNode() 120 MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) { in setRegister() function
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 49 void setRegister(unsigned R) { Register = R; } in setRegister() function
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| /llvm-project-15.0.7/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 142 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister() function
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| /llvm-project-15.0.7/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 735 Row.getCFAValue().setRegister(*RegNum); in parseRows()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 5513 PALMetadata->setRegister(Key, Value); in ParseDirectivePALMetadata()
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