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/llvm-project-15.0.7/llvm/test/MC/AMDGPU/
H A Dflat-scratch-gfx940.s3 scratch_load_dword a2, v4, s6
6 scratch_load_dword a2, v4, s6 offset:16
15 scratch_load_dword a2, off, s6
27 scratch_load_dword v2, v4, s6
39 scratch_load_dword v2, off, s6
195 scratch_load_sbyte a2, v4, s6
207 scratch_load_sbyte a2, off, s6
219 scratch_load_sbyte v2, v4, s6
231 scratch_load_sbyte v2, off, s6
483 scratch_load_ubyte a2, v4, s6
[all …]
H A Dgfx10_asm_vopc_sdwa.s126 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:DWORD src1_sel:DWORD
146 v_cmp_f_f32_sdwa s6, s1, v2 src0_sel:DWORD src1_sel:DWORD
162 v_cmp_f_f32_sdwa s6, m0, v2 src0_sel:DWORD src1_sel:DWORD
178 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:BYTE_0 src1_sel:DWORD
182 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:BYTE_1 src1_sel:DWORD
186 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:BYTE_2 src1_sel:DWORD
190 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:BYTE_3 src1_sel:DWORD
194 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:WORD_0 src1_sel:DWORD
198 v_cmp_f_f32_sdwa s6, v1, v2 src0_sel:WORD_1 src1_sel:DWORD
202 v_cmp_f_f32_sdwa s6, -v1, v2 src0_sel:DWORD src1_sel:DWORD
[all …]
H A Dsop2.s51 s_and_b32 s2, s4, s6
76 s_or_b32 s2, s4, s6
86 s_xor_b32 s2, s4, s6
106 s_orn2_b32 s2, s4, s6
116 s_nand_b32 s2, s4, s6
126 s_nor_b32 s2, s4, s6
136 s_xnor_b32 s2, s4, s6
181 s_bfm_b32 s2, s4, s6
191 s_mul_i32 s2, s4, s6
196 s_bfe_u32 s2, s4, s6
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Didiv-licm.ll24 ; GFX9-NEXT: s_add_i32 s6, s6, s7
26 ; GFX9-NEXT: s_mul_hi_u32 s6, s2, s6
27 ; GFX9-NEXT: s_add_i32 s6, s6, s7
35 ; GFX9-NEXT: s_not_b32 s6, s6
36 ; GFX9-NEXT: s_mul_i32 s6, s4, s6
38 ; GFX9-NEXT: s_add_i32 s6, s2, s6
72 ; GFX10-NEXT: s_add_i32 s6, s6, s7
75 ; GFX10-NEXT: s_add_i32 s6, s6, s7
125 ; GFX11-NEXT: s_add_i32 s6, s6, s7
129 ; GFX11-NEXT: s_add_i32 s6, s6, s7
[all …]
H A Dimage-load-d16-tfe.ll14 ; GFX9-NEXT: s_mov_b32 s8, s6
16 ; GFX9-NEXT: s_mov_b32 s6, s4
34 ; GFX10-NEXT: s_mov_b32 s8, s6
36 ; GFX10-NEXT: s_mov_b32 s6, s4
54 ; GFX11-NEXT: s_mov_b32 s8, s6
56 ; GFX11-NEXT: s_mov_b32 s6, s4
103 ; GFX9-NEXT: s_mov_b32 s8, s6
105 ; GFX9-NEXT: s_mov_b32 s6, s4
123 ; GFX10-NEXT: s_mov_b32 s8, s6
192 ; GFX9-NEXT: s_mov_b32 s8, s6
[all …]
H A Doverlapping-tuple-copy-implicit-op-failure.ll53 ; CHECK-NEXT: v_add_co_u32 v6, s6, v6, v7
54 ; CHECK-NEXT: v_add_co_ci_u32_e64 v4, s6, v4, v5, s6
61 ; CHECK-NEXT: v_add_co_u32 v4, s6, v4, v5
62 ; CHECK-NEXT: v_add_co_ci_u32_e64 v2, s6, v2, v3, s6
69 ; CHECK-NEXT: v_add_co_u32 v2, s6, v2, v3
70 ; CHECK-NEXT: v_add_co_ci_u32_e64 v0, s6, v0, v1, s6
77 ; CHECK-NEXT: v_add_co_u32 v0, s6, v0, v9
78 ; CHECK-NEXT: v_add_co_ci_u32_e64 v8, s6, v1, v8, s6
H A Dinsert_vector_elt.ll135 ; SI-NEXT: s_mov_b32 s6, -1
150 ; VI-NEXT: s_mov_b32 s6, -1
170 ; SI-NEXT: s_mov_b32 s6, -1
185 ; VI-NEXT: s_mov_b32 s6, -1
205 ; SI-NEXT: s_mov_b32 s6, -1
220 ; VI-NEXT: s_mov_b32 s6, -1
240 ; SI-NEXT: s_mov_b32 s6, -1
255 ; VI-NEXT: s_mov_b32 s6, -1
275 ; SI-NEXT: s_mov_b32 s6, -1
290 ; VI-NEXT: s_mov_b32 s6, -1
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dmve-vcmpfr.ll580 ; CHECK-MVE-NEXT: vseleq.f16 s6, s5, s6
594 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
608 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
622 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
657 ; CHECK-MVE-NEXT: vseleq.f16 s6, s5, s6
675 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
693 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
711 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
747 ; CHECK-MVE-NEXT: vseleq.f16 s6, s5, s6
761 ; CHECK-MVE-NEXT: vseleq.f16 s6, s8, s6
[all …]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Dsop2_vi.txt3 # VI: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x86]
9 # VI: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
15 # VI: s_xor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
21 # VI: s_andn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x89]
27 # VI: s_orn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8a]
33 # VI: s_nand_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8b]
39 # VI: s_nor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8c]
45 # VI: s_xnor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8d]
51 # VI: s_lshl_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8e]
69 # VI: s_bfm_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x91]
[all …]
H A Dflat-scratch-gfx940.txt3 # GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
6 # GFX940: scratch_load_dword a2, v4, s6 offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0x86,0…
15 # GFX940: scratch_load_dword a2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x86,0x02]
27 # GFX940: scratch_load_dword v2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x06,0x02]
39 # GFX940: scratch_load_dword v2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x06,0x02]
195 # GFX940: scratch_load_sbyte a2, v4, s6 ; encoding: [0x00,0x60,0x44,0xdc,0x04,0x00,0x86,0x02]
207 # GFX940: scratch_load_sbyte a2, off, s6 ; encoding: [0x00,0x40,0x44,0xdc,0x00,0x00,0x86,0x02]
219 # GFX940: scratch_load_sbyte v2, v4, s6 ; encoding: [0x00,0x60,0x44,0xdc,0x04,0x00,0x06,0x02]
231 # GFX940: scratch_load_sbyte v2, off, s6 ; encoding: [0x00,0x40,0x44,0xdc,0x00,0x00,0x06,0x02]
483 # GFX940: scratch_load_ubyte a2, v4, s6 ; encoding: [0x00,0x60,0x40,0xdc,0x04,0x00,0x86,0x02]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.image.atomic.dim.ll16 ; GFX6-NEXT: s_mov_b32 s4, s6
18 ; GFX6-NEXT: s_mov_b32 s6, s8
30 ; GFX8-NEXT: s_mov_b32 s4, s6
32 ; GFX8-NEXT: s_mov_b32 s6, s8
44 ; GFX900-NEXT: s_mov_b32 s4, s6
46 ; GFX900-NEXT: s_mov_b32 s6, s8
93 ; GFX6-NEXT: s_mov_b32 s4, s6
95 ; GFX6-NEXT: s_mov_b32 s6, s8
107 ; GFX8-NEXT: s_mov_b32 s4, s6
109 ; GFX8-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.store.2d.ll14 ; GFX6-NEXT: s_mov_b32 s4, s6
16 ; GFX6-NEXT: s_mov_b32 s6, s8
27 ; GFX8-NEXT: s_mov_b32 s4, s6
29 ; GFX8-NEXT: s_mov_b32 s6, s8
40 ; GFX10-NEXT: s_mov_b32 s4, s6
42 ; GFX10-NEXT: s_mov_b32 s6, s8
53 ; GFX11-NEXT: s_mov_b32 s4, s6
71 ; GFX6-NEXT: s_mov_b32 s4, s6
73 ; GFX6-NEXT: s_mov_b32 s6, s8
84 ; GFX8-NEXT: s_mov_b32 s4, s6
[all …]
H A Dllvm.amdgcn.image.load.1d.ll15 ; GFX68-NEXT: s_mov_b32 s4, s6
17 ; GFX68-NEXT: s_mov_b32 s6, s8
29 ; GFX10-NEXT: s_mov_b32 s4, s6
31 ; GFX10-NEXT: s_mov_b32 s6, s8
43 ; NOPRT-NEXT: s_mov_b32 s4, s6
45 ; NOPRT-NEXT: s_mov_b32 s6, s8
61 ; GFX68-NEXT: s_mov_b32 s4, s6
63 ; GFX68-NEXT: s_mov_b32 s6, s8
75 ; GFX10-NEXT: s_mov_b32 s4, s6
77 ; GFX10-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.getresinfo.ll14 ; GFX6-NEXT: s_mov_b32 s4, s6
16 ; GFX6-NEXT: s_mov_b32 s6, s8
28 ; GFX8-NEXT: s_mov_b32 s4, s6
30 ; GFX8-NEXT: s_mov_b32 s6, s8
42 ; GFX10-NEXT: s_mov_b32 s4, s6
44 ; GFX10-NEXT: s_mov_b32 s6, s8
61 ; GFX6-NEXT: s_mov_b32 s4, s6
63 ; GFX6-NEXT: s_mov_b32 s6, s8
75 ; GFX8-NEXT: s_mov_b32 s4, s6
77 ; GFX8-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.load.1d.d16.ll43 ; GFX9-NEXT: s_mov_b32 s4, s6
45 ; GFX9-NEXT: s_mov_b32 s6, s8
103 ; GFX9-NEXT: s_mov_b32 s4, s6
105 ; GFX9-NEXT: s_mov_b32 s6, s8
163 ; GFX9-NEXT: s_mov_b32 s4, s6
165 ; GFX9-NEXT: s_mov_b32 s6, s8
223 ; GFX9-NEXT: s_mov_b32 s4, s6
225 ; GFX9-NEXT: s_mov_b32 s6, s8
286 ; GFX9-NEXT: s_mov_b32 s4, s6
288 ; GFX9-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.atomic.dim.a16.ll13 ; GFX9-NEXT: s_mov_b32 s4, s6
15 ; GFX9-NEXT: s_mov_b32 s6, s8
27 ; GFX10-NEXT: s_mov_b32 s4, s6
29 ; GFX10-NEXT: s_mov_b32 s6, s8
47 ; GFX9-NEXT: s_mov_b32 s4, s6
49 ; GFX9-NEXT: s_mov_b32 s6, s8
61 ; GFX10-NEXT: s_mov_b32 s4, s6
63 ; GFX10-NEXT: s_mov_b32 s6, s8
81 ; GFX9-NEXT: s_mov_b32 s4, s6
83 ; GFX9-NEXT: s_mov_b32 s6, s8
[all …]
H A Dllvm.amdgcn.image.store.2d.d16.ll14 ; UNPACKED-NEXT: s_mov_b32 s4, s6
16 ; UNPACKED-NEXT: s_mov_b32 s6, s8
27 ; GFX81-NEXT: s_mov_b32 s4, s6
29 ; GFX81-NEXT: s_mov_b32 s6, s8
39 ; PACKED-NEXT: s_mov_b32 s4, s6
41 ; PACKED-NEXT: s_mov_b32 s6, s8
70 ; GFX81-NEXT: s_mov_b32 s4, s6
72 ; GFX81-NEXT: s_mov_b32 s6, s8
82 ; PACKED-NEXT: s_mov_b32 s4, s6
118 ; GFX81-NEXT: s_mov_b32 s4, s6
[all …]
H A Dllvm.amdgcn.image.getresinfo.a16.ll13 ; GFX9-NEXT: s_mov_b32 s4, s6
15 ; GFX9-NEXT: s_mov_b32 s6, s8
27 ; GFX10-NEXT: s_mov_b32 s4, s6
29 ; GFX10-NEXT: s_mov_b32 s6, s8
46 ; GFX9-NEXT: s_mov_b32 s4, s6
48 ; GFX9-NEXT: s_mov_b32 s6, s8
60 ; GFX10-NEXT: s_mov_b32 s4, s6
62 ; GFX10-NEXT: s_mov_b32 s6, s8
79 ; GFX9-NEXT: s_mov_b32 s4, s6
81 ; GFX9-NEXT: s_mov_b32 s6, s8
[all …]
H A Dnon-entry-alloca.ll22 ; GCN-NEXT: s_cmp_lg_u32 s6, 0
27 ; GCN-NEXT: s_cmp_lg_u32 s6, 0
36 ; GCN-NEXT: s_lshl_b32 s6, s6, 2
37 ; GCN-NEXT: s_add_u32 s6, s7, s6
40 ; GCN-NEXT: v_mov_b32_e32 v2, s6
94 ; GCN-NEXT: s_cmp_lg_u32 s6, 0
103 ; GCN-NEXT: s_lshl_b32 s6, s6, 2
105 ; GCN-NEXT: s_add_u32 s6, s7, s6
108 ; GCN-NEXT: v_mov_b32_e32 v2, s6
166 ; GCN-NEXT: v_mov_b32_e32 v3, s6
[all …]
H A Dllvm.amdgcn.image.gather4.dim.ll14 ; GFX6-NEXT: s_mov_b32 s4, s6
16 ; GFX6-NEXT: s_mov_b32 s6, s8
61 ; GFX6-NEXT: s_mov_b32 s4, s6
63 ; GFX6-NEXT: s_mov_b32 s6, s8
123 ; GFX6-NEXT: s_mov_b32 s4, s6
125 ; GFX6-NEXT: s_mov_b32 s6, s8
170 ; GFX6-NEXT: s_mov_b32 s4, s6
172 ; GFX6-NEXT: s_mov_b32 s6, s8
217 ; GFX6-NEXT: s_mov_b32 s4, s6
219 ; GFX6-NEXT: s_mov_b32 s6, s8
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Linalg/IR/
H A DLinalgNamedStructuredOps.yaml1254 (s2, s6)>
2048 s6)>
2140 s6)>
2240 s6)>
2791 s6)>
2869 s6)>
2953 s6)>
3032 s6)>
3106 s6)>
3190 s6)>
[all …]
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dinvalid-fp-armv8.s10 vsel.f32 s3, s4, s6
12 vselne.f32 s3, s4, s6
14 vselmi.f32 s3, s4, s6
16 vselpl.f32 s3, s4, s6
18 vselvc.f32 s3, s4, s6
20 vselcs.f32 s3, s4, s6
22 vselcc.f32 s3, s4, s6
24 vselhs.f32 s3, s4, s6
26 vsello.f32 s3, s4, s6
28 vselhi.f32 s3, s4, s6
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dcallee-saved-gprs.ll72 ; RV32I-NEXT: lw s6, 76(a5)
97 ; RV32I-NEXT: sw s6, 76(a5)
183 ; RV32I-WITH-FP-NEXT: lw s6, 72(a5)
210 ; RV32I-WITH-FP-NEXT: sw s6, 72(a5)
295 ; RV64I-NEXT: lw s6, 76(a5)
320 ; RV64I-NEXT: sw s6, 76(a5)
406 ; RV64I-WITH-FP-NEXT: lw s6, 72(a5)
547 ; RV32I-NEXT: lw s6, 96(s5)
563 ; RV32I-NEXT: sw s6, 96(s5)
836 ; RV64I-NEXT: lw s6, 96(s5)
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drvzfinx-aliases-valid.s33 # CHECK-INST: flt.s tp, s6, s5
34 # CHECK-ALIAS: flt.s tp, s6, s5
35 fgt.s x4, s5, s6
53 # CHECK-INST: fnmadd.s s6, s7, s8, s9, dyn
54 # CHECK-ALIAS: fnmadd.s s6, s7, s8, s9
68 # CHECK-INST: sqrt.s s6, s7, dyn
69 # CHECK-ALIAS: sqrt.s s6, s7
70 fsqrt.s s6, s7
74 # CHECK-INST: fcvt.wu.s a1, s6, dyn
75 # CHECK-ALIAS: fcvt.wu.s a1, s6
[all …]
H A Drvzhinx-aliases-valid.s33 # CHECK-INST: flt.h tp, s6, s5
34 # CHECK-ALIAS: flt.h tp, s6, s5
35 fgt.h x4, s5, s6
53 # CHECK-INST: fnmadd.h s6, s7, s8, s9, dyn
54 # CHECK-ALIAS: fnmadd.h s6, s7, s8, s9
68 # CHECK-INST: fsqrt.h s6, s7, dyn
69 # CHECK-ALIAS: fsqrt.h s6, s7
70 fsqrt.h s6, s7
74 # CHECK-INST: fcvt.wu.h a1, s6, dyn
75 # CHECK-ALIAS: fcvt.wu.h a1, s6
[all …]

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