Lines Matching refs:s6
21 ; GFX9-NEXT: v_readfirstlane_b32 s6, v0
22 ; GFX9-NEXT: s_mul_i32 s7, s5, s6
23 ; GFX9-NEXT: s_mul_hi_u32 s7, s6, s7
24 ; GFX9-NEXT: s_add_i32 s6, s6, s7
25 ; GFX9-NEXT: s_mul_i32 s7, s3, s6
26 ; GFX9-NEXT: s_mul_hi_u32 s6, s2, s6
27 ; GFX9-NEXT: s_add_i32 s6, s6, s7
28 ; GFX9-NEXT: s_mul_i32 s7, s5, s6
31 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
34 ; GFX9-NEXT: s_add_i32 s7, s6, 1
35 ; GFX9-NEXT: s_not_b32 s6, s6
36 ; GFX9-NEXT: s_mul_i32 s6, s4, s6
38 ; GFX9-NEXT: s_add_i32 s6, s2, s6
40 ; GFX9-NEXT: v_mov_b32_e32 v4, s6
69 ; GFX10-NEXT: v_readfirstlane_b32 s6, v0
70 ; GFX10-NEXT: s_mul_i32 s7, s5, s6
71 ; GFX10-NEXT: s_mul_hi_u32 s7, s6, s7
72 ; GFX10-NEXT: s_add_i32 s6, s6, s7
73 ; GFX10-NEXT: s_mul_i32 s7, s3, s6
74 ; GFX10-NEXT: s_mul_hi_u32 s6, s2, s6
75 ; GFX10-NEXT: s_add_i32 s6, s6, s7
76 ; GFX10-NEXT: s_mul_i32 s7, s5, s6
80 ; GFX10-NEXT: s_add_i32 s8, s6, 1
81 ; GFX10-NEXT: s_not_b32 s9, s6
87 ; GFX10-NEXT: v_cndmask_b32_e32 v2, s6, v2, vcc_lo
121 ; GFX11-NEXT: v_readfirstlane_b32 s6, v0
122 ; GFX11-NEXT: s_mul_i32 s7, s5, s6
124 ; GFX11-NEXT: s_mul_hi_u32 s7, s6, s7
125 ; GFX11-NEXT: s_add_i32 s6, s6, s7
127 ; GFX11-NEXT: s_mul_i32 s7, s3, s6
128 ; GFX11-NEXT: s_mul_hi_u32 s6, s2, s6
129 ; GFX11-NEXT: s_add_i32 s6, s6, s7
131 ; GFX11-NEXT: s_mul_i32 s7, s5, s6
136 ; GFX11-NEXT: s_add_i32 s8, s6, 1
137 ; GFX11-NEXT: s_not_b32 s9, s6
144 ; GFX11-NEXT: v_cndmask_b32_e32 v2, s6, v2, vcc_lo
190 ; GFX9-NEXT: v_readfirstlane_b32 s6, v0
191 ; GFX9-NEXT: s_mul_i32 s7, s5, s6
192 ; GFX9-NEXT: s_mul_hi_u32 s7, s6, s7
193 ; GFX9-NEXT: s_add_i32 s6, s6, s7
194 ; GFX9-NEXT: s_mul_i32 s7, s3, s6
195 ; GFX9-NEXT: s_mul_hi_u32 s6, s2, s6
196 ; GFX9-NEXT: s_add_i32 s6, s6, s7
197 ; GFX9-NEXT: s_mul_i32 s7, s5, s6
198 ; GFX9-NEXT: s_not_b32 s6, s6
199 ; GFX9-NEXT: s_mul_i32 s6, s4, s6
201 ; GFX9-NEXT: s_add_i32 s6, s2, s6
203 ; GFX9-NEXT: s_cselect_b32 s6, s6, s7
204 ; GFX9-NEXT: s_sub_i32 s7, s6, s4
205 ; GFX9-NEXT: s_cmp_ge_u32 s6, s4
206 ; GFX9-NEXT: s_cselect_b32 s6, s7, s6
208 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
232 ; GFX10-NEXT: v_readfirstlane_b32 s6, v0
233 ; GFX10-NEXT: s_mul_i32 s7, s5, s6
234 ; GFX10-NEXT: s_mul_hi_u32 s7, s6, s7
235 ; GFX10-NEXT: s_add_i32 s6, s6, s7
236 ; GFX10-NEXT: s_mul_i32 s7, s3, s6
237 ; GFX10-NEXT: s_mul_hi_u32 s6, s2, s6
238 ; GFX10-NEXT: s_add_i32 s6, s6, s7
239 ; GFX10-NEXT: s_not_b32 s7, s6
240 ; GFX10-NEXT: s_mul_i32 s6, s5, s6
242 ; GFX10-NEXT: s_add_i32 s6, s2, s6
244 ; GFX10-NEXT: s_cmp_ge_u32 s6, s4
245 ; GFX10-NEXT: s_cselect_b32 s6, s7, s6
246 ; GFX10-NEXT: s_sub_i32 s7, s6, s4
247 ; GFX10-NEXT: s_cmp_ge_u32 s6, s4
248 ; GFX10-NEXT: s_cselect_b32 s6, s7, s6
250 ; GFX10-NEXT: v_mov_b32_e32 v2, s6
280 ; GFX11-NEXT: v_readfirstlane_b32 s6, v0
281 ; GFX11-NEXT: s_mul_i32 s7, s5, s6
283 ; GFX11-NEXT: s_mul_hi_u32 s7, s6, s7
284 ; GFX11-NEXT: s_add_i32 s6, s6, s7
286 ; GFX11-NEXT: s_mul_i32 s7, s3, s6
287 ; GFX11-NEXT: s_mul_hi_u32 s6, s2, s6
288 ; GFX11-NEXT: s_add_i32 s6, s6, s7
290 ; GFX11-NEXT: s_not_b32 s7, s6
291 ; GFX11-NEXT: s_mul_i32 s6, s5, s6
293 ; GFX11-NEXT: s_add_i32 s6, s2, s6
295 ; GFX11-NEXT: s_cmp_ge_u32 s6, s4
296 ; GFX11-NEXT: s_cselect_b32 s6, s7, s6
298 ; GFX11-NEXT: s_sub_i32 s7, s6, s4
299 ; GFX11-NEXT: s_cmp_ge_u32 s6, s4
300 ; GFX11-NEXT: s_cselect_b32 s6, s7, s6
302 ; GFX11-NEXT: v_mov_b32_e32 v2, s6
390 ; GFX10-NEXT: v_readfirstlane_b32 s6, v0
391 ; GFX10-NEXT: s_mul_i32 s7, s5, s6
392 ; GFX10-NEXT: s_mul_hi_u32 s7, s6, s7
393 ; GFX10-NEXT: s_add_i32 s6, s6, s7
394 ; GFX10-NEXT: s_mul_hi_u32 s6, s4, s6
395 ; GFX10-NEXT: s_mul_i32 s7, s6, s3
399 ; GFX10-NEXT: s_add_i32 s8, s6, 1
404 ; GFX10-NEXT: v_cndmask_b32_e32 v2, s6, v2, vcc_lo
444 ; GFX11-NEXT: v_readfirstlane_b32 s6, v0
445 ; GFX11-NEXT: s_mul_i32 s7, s5, s6
447 ; GFX11-NEXT: s_mul_hi_u32 s7, s6, s7
448 ; GFX11-NEXT: s_add_i32 s6, s6, s7
450 ; GFX11-NEXT: s_mul_hi_u32 s6, s4, s6
451 ; GFX11-NEXT: s_mul_i32 s7, s6, s3
456 ; GFX11-NEXT: s_add_i32 s8, s6, 1
462 ; GFX11-NEXT: v_cndmask_b32_e32 v2, s6, v2, vcc_lo
515 ; GFX9-NEXT: s_mul_i32 s6, s4, s5
516 ; GFX9-NEXT: s_mul_hi_u32 s6, s5, s6
517 ; GFX9-NEXT: s_add_i32 s5, s5, s6
521 ; GFX9-NEXT: s_sub_i32 s6, s5, s2
523 ; GFX9-NEXT: s_cselect_b32 s5, s6, s5
524 ; GFX9-NEXT: s_sub_i32 s6, s5, s2
526 ; GFX9-NEXT: s_cselect_b32 s5, s6, s5
555 ; GFX10-NEXT: s_mul_i32 s6, s4, s5
556 ; GFX10-NEXT: s_mul_hi_u32 s6, s5, s6
557 ; GFX10-NEXT: s_add_i32 s5, s5, s6
561 ; GFX10-NEXT: s_sub_i32 s6, s5, s2
563 ; GFX10-NEXT: s_cselect_b32 s5, s6, s5
564 ; GFX10-NEXT: s_sub_i32 s6, s5, s2
566 ; GFX10-NEXT: s_cselect_b32 s5, s6, s5
602 ; GFX11-NEXT: s_mul_i32 s6, s4, s5
604 ; GFX11-NEXT: s_mul_hi_u32 s6, s5, s6
605 ; GFX11-NEXT: s_add_i32 s5, s5, s6
611 ; GFX11-NEXT: s_sub_i32 s6, s5, s2
613 ; GFX11-NEXT: s_cselect_b32 s5, s6, s5
615 ; GFX11-NEXT: s_sub_i32 s6, s5, s2
617 ; GFX11-NEXT: s_cselect_b32 s5, s6, s5
651 ; GFX9-NEXT: s_movk_i32 s6, 0x400
664 ; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, s6, v3
698 ; GFX10-NEXT: s_add_u32 s6, s2, s4
735 ; GFX11-NEXT: s_add_u32 s6, s2, s4
780 ; GFX9-NEXT: s_and_b32 s6, 0xffff, s2
781 ; GFX9-NEXT: v_cvt_f32_u32_e32 v2, s6
797 ; GFX9-NEXT: v_mul_lo_u32 v8, v8, s6
908 ; GFX9-NEXT: s_mov_b32 s6, 0
912 ; GFX9-NEXT: s_sext_i32_i16 s2, s6
924 ; GFX9-NEXT: s_and_b32 s2, s6, 0xffff
925 ; GFX9-NEXT: v_add_u16_e64 v3, s6, 1
929 ; GFX9-NEXT: v_readfirstlane_b32 s6, v3
961 ; GFX10-NEXT: v_cmp_ge_f32_e64 s6, |v4|, |v0|
963 ; GFX10-NEXT: s_and_b32 s6, s6, exec_lo
964 ; GFX10-NEXT: s_cselect_b32 s6, s0, 0
967 ; GFX10-NEXT: v_add_nc_u32_e32 v3, s6, v4
969 ; GFX10-NEXT: s_add_u32 s6, s2, s6
1006 ; GFX11-NEXT: v_cmp_ge_f32_e64 s6, |v4|, |v0|
1008 ; GFX11-NEXT: s_and_b32 s6, s6, exec_lo
1009 ; GFX11-NEXT: s_cselect_b32 s6, s2, 0
1012 ; GFX11-NEXT: v_add_nc_u32_e32 v3, s6, v4
1015 ; GFX11-NEXT: s_add_u32 s6, s0, s6
1050 ; GFX9-NEXT: s_mov_b32 s6, 0
1054 ; GFX9-NEXT: s_sext_i32_i16 s7, s6
1065 ; GFX9-NEXT: v_add_u16_e64 v3, s6, 1
1068 ; GFX9-NEXT: s_and_b32 s2, s6, 0xffff
1069 ; GFX9-NEXT: v_readfirstlane_b32 s6, v3
1105 ; GFX10-NEXT: v_cmp_ge_f32_e64 s6, |v4|, |v0|
1107 ; GFX10-NEXT: s_and_b32 s6, s6, exec_lo
1108 ; GFX10-NEXT: s_cselect_b32 s6, s0, 0
1110 ; GFX10-NEXT: v_add_nc_u32_e32 v4, s6, v4
1113 ; GFX10-NEXT: s_add_u32 s6, s2, s6
1153 ; GFX11-NEXT: v_cmp_ge_f32_e64 s6, |v4|, |v0|
1155 ; GFX11-NEXT: s_and_b32 s6, s6, exec_lo
1156 ; GFX11-NEXT: s_cselect_b32 s6, s2, 0
1159 ; GFX11-NEXT: v_add_nc_u32_e32 v4, s6, v4
1162 ; GFX11-NEXT: s_add_u32 s6, s0, s6