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Searched refs:rev16 (Results 1 – 25 of 56) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dbswap16.ll9 ; CHECK-NEXT: rev16 r1, r1
22 ; CHECK-NEXT: rev16 r1, r1
35 ; CHECK-NEXT: rev16 r0, r0
H A Drev.ll9 ; CHECK-NEXT: rev16 r0, r0
102 ; CHECK-NEXT: rev16 r0, r0
164 ; CHECK-NEXT: rev16 r0, r0
178 ; CHECK-NEXT: rev16 r0, r0
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dthumb2-rev16.ll6 define i32 @rev16(i32 %a) {
7 ; CHECK-LABEL: rev16:
9 ; CHECK-NEXT: rev16 r0, r0
60 ; CHECK-NEXT: rev16 r0, r0
138 ; FIXME: this rev16 pattern is not matching
H A D2010-04-26-CopyRegCrash.ll54 %asmtmp.i.i179 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 undef) nounwind ; <i16> [#uses=1]
55 …%asmtmp.i.i178 = tail call i16 asm "rev16 $0, $1\0A", "=l,l"(i16 %asmtmp.i.i179) nounwind ; <i16> …
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dthumb.s19 rev16 r3, r4
22 @ CHECK: rev16 r3, r4 @ encoding: [0x63,0xba]
H A Dbasic-thumb-instructions.s475 rev16 r7, r2
479 @ CHECK: rev16 r7, r2 @ encoding: [0x57,0xba]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-rev.ll86 ; CHECK-NEXT: rev16 w0, w8
177 ; CHECK-NEXT: rev16 w0, w0
208 ; 01234567 ->(rev16) 10325476
459 ; CHECK-NEXT: rev16.8b v0, v0
465 ; GISEL-NEXT: rev16.8b v0, v0
476 ; CHECK-NEXT: rev16.16b v0, v0
611 ; CHECK-NEXT: rev16 w8, w8
655 ; CHECK-NEXT: rev16 w0, w8
684 ; 01234567 ->(rev16) 10325476
689 ; CHECK-NEXT: rev16 x0, x0
[all …]
H A Dneon_rbit.ll34 ; CHECK-NEXT: rev16 v0.8b, v0.8b
46 ; CHECK-NEXT: rev16 v0.16b, v0.16b
H A Dbitreverse.ll92 ; CHECK-NEXT: rev16 v0.8b, v0.8b
104 ; CHECK-NEXT: rev16 v0.16b, v0.16b
H A Dmerge-store-dependency.ll105 ; TODO: rev16?
124 ; TODO: rev16?
H A Darm64-big-endian-bitconverts.ll528 ; CHECK: rev16 v{{[0-9]+}}.8b
629 ; CHECK: rev16 v{{[0-9]+}}.8b
709 ; CHECK: rev16 v{{[0-9]+}}.8b
1208 ; CHECK: rev16 v{{[0-9]+}}.16b
1288 ; CHECK: rev16 v{{[0-9]+}}.16b
1302 ; CHECK: rev16 v{{[0-9]+}}.16b
H A Darm64-addp.ll134 ; CHECK-NEXT: rev16.16b v1, v0
H A Daarch64-load-ext.ll143 ; CHECK-BE-NEXT: rev16 v0.8b, v0.8b
287 ; CHECK-BE-NEXT: rev16 v0.8b, v0.8b
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Drev16.ll7 define i32 @rev16(i32 %a) {
8 ; X86-LABEL: rev16:
15 ; X64-LABEL: rev16:
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drv64zbp-aliases-valid.s63 # CHECK-S-OBJ: rev16.w t0, t1
64 rev16.w x5, x6
87 # CHECK-S-OBJ: rev16 t0, t1
88 rev16 x5, x6 label
H A Drv32zbp-aliases-valid.s63 # CHECK-S-OBJ: rev16 t0, t1
64 rev16 x5, x6 label
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb/
H A Drev.ll7 ; CHECK-NEXT: rev16 r0, r0
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dbitreverse.ll40 define i16 @rev16(i16 %v) {
41 ; CHECK-LABEL: @rev16(
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Dneon-simd-misc.s33 rev16 v30.16b, v31.16b
34 rev16 v21.8b, v1.8b
H A Darm64-arithmetic-encoding.s440 rev16 w1, w2
441 rev16 x1, x2
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dthumb1.txt345 # CHECK: rev16 r7, r2
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Darm64-arithmetic.txt408 # CHECK: rev16 w1, w2
410 # CHECK: rev16 x1, x2
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/ARM/
H A Dm7-int.s221 rev16 r0, r1 label
222 rev16.w r0, r1
653 # CHECK-NEXT: 1 1 1.00 rev16 r0, r1
654 # CHECK-NEXT: 1 1 1.00 rev16.w r0, r1
1093 … 0.50 - - - - 1.00 1.00 - - - - - rev16 r0, r1
1094 … 0.50 - - - - 1.00 1.00 - - - - - rev16.w r0, r1
H A Dm4-int.s228 rev16 r0, r1 label
229 rev16.w r0, r1
675 # CHECK-NEXT: 1 1 1.00 rev16 r0, r1
676 # CHECK-NEXT: 1 1 1.00 rev16.w r0, r1
1113 # CHECK-NEXT: 1.00 rev16 r0, r1
1114 # CHECK-NEXT: 1.00 rev16.w r0, r1
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrGISel.td28 // Pseudo for a rev16 instruction. Produced post-legalization from

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