| /llvm-project-15.0.7/compiler-rt/test/sanitizer_common/TestCases/Linux/ |
| H A D | ptrace.cpp | 36 user_regs_struct regs; in main() local 39 if (regs.rip) in main() 40 printf("%zx\n", regs.rip); in main() 59 if (regs.nip) in main() 60 printf("%lx\n", regs.nip); in main() 62 if (regs.cp0_epc) in main() 65 if (regs.ARM_pc) in main() 86 struct user_pt_regs regs; in main() local 87 regset_io.iov_base = ®s; in main() 91 if (regs.pc) in main() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | ia-mem-r0.ll | 14 %regs = alloca [18 x i64], align 8 16 %1 = bitcast [18 x i64]* %regs to i64* 18 %2 = bitcast [18 x i64]* %regs to i8* 22 %5 = bitcast [18 x i64]* %regs to i8* 26 %8 = bitcast [18 x i64]* %regs to i8* 30 %11 = bitcast [18 x i64]* %regs to i8* 34 %14 = bitcast [18 x i64]* %regs to i8* 38 %17 = bitcast [18 x i64]* %regs to i8* 42 %20 = bitcast [18 x i64]* %regs to i8* 46 %23 = bitcast [18 x i64]* %regs to i8* [all …]
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| /llvm-project-15.0.7/lldb/source/Plugins/ABI/X86/ |
| H A D | ABIX86.cpp | 57 addPartialRegisters(std::vector<DynamicRegisterInfo::Register> ®s, in addPartialRegisters() argument 64 DynamicRegisterInfo::Register &full_reg = regs[base_index]; in addPartialRegisters() 84 addSupplementaryRegister(regs, new_reg); in addPartialRegisters() 89 addCombinedRegisters(std::vector<DynamicRegisterInfo::Register> ®s, in addCombinedRegisters() argument 105 if (regs[base_index1].byte_size != base_size || in addCombinedRegisters() 106 regs[base_index2].byte_size != base_size) in addCombinedRegisters() 124 addSupplementaryRegister(regs, new_reg); in addCombinedRegisters() 198 std::vector<DynamicRegisterInfo::Register> ®s) { in AugmentRegisterInfo() argument 199 MCBasedABI::AugmentRegisterInfo(regs); in AugmentRegisterInfo() 223 for (const auto &x : llvm::enumerate(regs)) { in AugmentRegisterInfo() [all …]
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| /llvm-project-15.0.7/lldb/source/Plugins/ABI/AArch64/ |
| H A D | ABIAArch64.cpp | 77 std::vector<lldb_private::DynamicRegisterInfo::Register> ®s, in addPartialRegisters() argument 83 if (!full_reg_index || regs[*full_reg_index].byte_size != full_reg_size) in addPartialRegisters() 101 addSupplementaryRegister(regs, partial_reg); in addPartialRegisters() 106 std::vector<lldb_private::DynamicRegisterInfo::Register> ®s) { in AugmentRegisterInfo() argument 107 lldb_private::MCBasedABI::AugmentRegisterInfo(regs); in AugmentRegisterInfo() 114 for (auto it : llvm::enumerate(regs)) { in AugmentRegisterInfo() 140 addPartialRegisters(regs, x_regs, 8, "w{0}", 4, lldb::eEncodingUint, in AugmentRegisterInfo() 142 addPartialRegisters(regs, v_regs, 16, "s{0}", 4, lldb::eEncodingIEEE754, in AugmentRegisterInfo() 144 addPartialRegisters(regs, v_regs, 16, "d{0}", 8, lldb::eEncodingIEEE754, in AugmentRegisterInfo()
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| /llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_stoptheworld_mac.cpp | 147 regs_struct regs; in GetRegistersAndSP() local 150 err = thread_get_state(thread, MACHINE_THREAD_STATE, (thread_state_t)®s, in GetRegistersAndSP() 162 buffer->resize(RoundUpTo(sizeof(regs), sizeof(uptr)) / sizeof(uptr)); in GetRegistersAndSP() 163 internal_memcpy(buffer->data(), ®s, sizeof(regs)); in GetRegistersAndSP() 165 *sp = arm_thread_state64_get_sp(regs); in GetRegistersAndSP() 167 *sp = regs.SP_REG; in GetRegistersAndSP()
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| H A D | sanitizer_stoptheworld_netbsd_libcdep.cpp | 341 struct reg regs; in GetRegistersAndSP() local 344 internal_iserror(internal_ptrace(PT_GETREGS, ppid, ®s, tid), &pterrno); in GetRegistersAndSP() 353 *sp = PTRACE_REG_SP(®s); in GetRegistersAndSP() 354 buffer->resize(RoundUpTo(sizeof(regs), sizeof(uptr)) / sizeof(uptr)); in GetRegistersAndSP() 355 internal_memcpy(buffer->data(), ®s, sizeof(regs)); in GetRegistersAndSP()
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| /llvm-project-15.0.7/llvm/lib/Support/BLAKE3/ |
| H A D | blake3_dispatch.c | 92 uint32_t regs[4] = {0}; in get_cpu_features() local 93 uint32_t *eax = ®s[0], *ebx = ®s[1], *ecx = ®s[2], *edx = ®s[3]; in get_cpu_features() 96 cpuid(regs, 0); in get_cpu_features() 98 cpuid(regs, 1); in get_cpu_features() 116 cpuidex(regs, 7, 0); in get_cpu_features()
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | indirect-reg-input.ll | 11 %regs = getelementptr inbounds %struct.my_stack, %struct.my_stack* %stack, i32 0, i32 0 12 …ct.myjmp_buf* elementtype(%struct.myjmp_buf) %regs, %struct.myjmp_buf* elementtype(%struct.myjmp_b…
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| H A D | tail-call-float.ll | 6 ; Tests for passing floating-point regs. Variadic functions will always use 31 ; of them to handle the 6 arguments. With hard-float, we have plenty of regs 42 ; Variadic functions cannot use FP regs to pass arguments; only GP regs.
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| /llvm-project-15.0.7/lldb/bindings/interface/ |
| H A D | SBFrame.i | 327 def __init__(self, regs): 328 self.regs = regs 332 for i in range(0,len(self.regs)): 333 rs = self.regs[i] 364 …regs = property(GetRegisters, None, doc='''A read only property that returns a list() that contain…
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| /llvm-project-15.0.7/lldb/test/API/functionalities/gdb_remote_client/ |
| H A D | TestTargetXMLArch.py | 91 regs = {0x0: "00b0060000610000", 98 if register in regs: 99 return regs[register]
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| /llvm-project-15.0.7/llvm/test/MC/RISCV/ |
| H A D | rv32zfh-invalid.s | 18 # Integer registers where FP regs are expected 21 # FP registers where integer regs are expected 32 # Integer registers where FP regs are expected 35 # FP registers where integer regs are expected
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| H A D | rv64f-invalid.s | 3 # Integer registers where FP regs are expected 7 # FP registers where integer regs are expected
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| H A D | rv64d-invalid.s | 3 # Integer registers where FP regs are expected 8 # FP registers where integer regs are expected
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| /llvm-project-15.0.7/mlir/lib/Dialect/LLVMIR/IR/ |
| H A D | NVVMDialect.cpp | 136 SmallVector<Value, 4> regs; in print() member 154 frag.regs.push_back(this->getOperand(operandIdx)); in print() 168 p.printOperands(frag.regs); in print() 181 llvm::interleaveComma(SmallVector<Type, 3>{frags[0].regs[0].getType(), in print() 182 frags[1].regs[0].getType(), in print() 248 SmallVector<OpAsmParser::UnresolvedOperand, 4> regs; in parse() member 296 frag.regTypes.resize(frag.regs.size(), iter.value()); in parse() 297 if (failed(parser.resolveOperands(frag.regs, frag.regTypes, in parse() 330 static_cast<int32_t>(frags[0].regs.size()), in parse() 331 static_cast<int32_t>(frags[1].regs.size()), in parse() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormatsF1.td | 158 bits<10> regs; 162 let Inst{24 - 21} = regs{3-0}; //imm4 167 let Inst{3 - 0} = regs{8-5}; 258 (ins GPR:$rx, regseq_f1:$regs, variable_ops), 259 !strconcat(op#"s", "\t$regs, (${rx})"), []>; 262 (ins GPR:$rx, regseq_d1:$regs, variable_ops), 263 !strconcat(op#"d", "\t$regs, (${rx})"), []>; 268 (ins GPR:$rx, regseq_f1:$regs, variable_ops), 269 !strconcat(op#"s", "\t$regs, (${rx})"), []>; 272 (ins GPR:$rx, regseq_d1:$regs, variable_ops), [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | zero-call-used-regs.ll | 7 define dso_local i32 @skip(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="skip" { 22 define dso_local i32 @used_gpr_arg(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="us… 38 define dso_local i32 @used_gpr(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="used-g… 54 define dso_local i32 @used_arg(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="used-a… 70 define dso_local i32 @used(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="used" { 86 define dso_local i32 @all_gpr_arg(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="all… 109 define dso_local i32 @all_gpr(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="all-gpr… 134 define dso_local i32 @all_arg(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="all-arg… 165 define dso_local i32 @all(i32 returned %x) local_unnamed_addr #0 "zero-call-used-regs"="all" {
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| H A D | ms-inline-asm-variables-x64-2-regs.ll | 17 ; CHECK: error: Don't use 2 or more regs for mem offset in PIC model 18 ; CHECK: error: Don't use 2 or more regs for mem offset in PIC model 19 ; CHECK: error: Don't use 2 or more regs for mem offset in PIC model
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| H A D | mmx-copy-gprs.ll | 6 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
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| /llvm-project-15.0.7/lldb/unittests/Target/ |
| H A D | DynamicRegisterInfoTest.cpp | 19 static std::vector<uint32_t> regs_to_vector(uint32_t *regs) { in regs_to_vector() argument 21 if (regs) { in regs_to_vector() 22 while (*regs != LLDB_INVALID_REGNUM) in regs_to_vector() 23 ret.push_back(*regs++); in regs_to_vector()
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| /llvm-project-15.0.7/compiler-rt/test/asan/TestCases/Linux/ |
| H A D | ptrace.cpp | 88 regs_struct regs; in main() local 89 regs_struct* volatile pregs = ®s; in main() 112 PRINT_REG_PC(regs); in main()
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| /llvm-project-15.0.7/lldb/source/Target/ |
| H A D | DynamicRegisterInfo.cpp | 214 StructuredData::Array *regs = nullptr; in SetRegisterInfo() local 215 if (!dict.GetValueForKeyAsArray("registers", regs)) in SetRegisterInfo() 220 const uint32_t num_regs = regs->GetSize(); in SetRegisterInfo() 226 if (!regs->GetItemAtIndexAsDictionary(i, reg_info_dict)) { in SetRegisterInfo() 229 regs->DumpToStdout(); in SetRegisterInfo() 384 std::vector<DynamicRegisterInfo::Register> &®s, in SetRegisterInfo() argument 388 for (auto it : llvm::enumerate(regs)) { in SetRegisterInfo() 798 std::vector<DynamicRegisterInfo::Register> ®s, in addSupplementaryRegister() argument 801 const uint32_t reg_num = regs.size(); in addSupplementaryRegister() 802 regs.push_back(new_reg_info); in addSupplementaryRegister() [all …]
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| H A D | ABI.cpp | 219 std::vector<DynamicRegisterInfo::Register> ®s) { in AugmentRegisterInfo() argument 220 for (DynamicRegisterInfo::Register &info : regs) { in AugmentRegisterInfo() 239 std::vector<DynamicRegisterInfo::Register> ®s) { in AugmentRegisterInfo() argument 240 for (DynamicRegisterInfo::Register &info : regs) { in AugmentRegisterInfo()
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb/ |
| H A D | callee_save.ll | 21 ; One high reg clobbered, but no low regs, args or returns. We can use an 39 ; 4 high regs clobbered, but still no low regs, args or returns. We can use all 40 ; 4 arg/return regs for the save/restore. 112 ; cannot be used while saving/restoring the high regs. 141 ; the high regs. 170 ; 4 high regs clobbered, all 4 argument registers used. We push an extra 4 low 171 ; registers, so that we can use them for saving the high regs. 196 ; 4 high regs clobbered, all 4 return registers used. We push an extra 4 low 197 ; registers, so that we can use them for restoring the high regs. 230 ; 4 high regs clobbered, all args & returns used, frame pointer requested and [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | zero-call-used-regs.ll | 7 …32 noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="skip" { 35 …undef %b, i32 noundef %c) local_unnamed_addr #0 noinline optnone "zero-call-used-regs"="used-gpr" { 51 …undef %b, i32 noundef %c) local_unnamed_addr #0 noinline optnone "zero-call-used-regs"="used-arg" { 66 …2 noundef %b, i32 noundef %c) local_unnamed_addr #0 noinline optnone "zero-call-used-regs"="used" { 82 …def %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="all-gpr-arg" { 104 …noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="all-gpr" { 135 …noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="all-arg" { 192 …i32 noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="all" { 311 …kip_float(double noundef %a, float noundef %b) local_unnamed_addr #0 "zero-call-used-regs"="skip" { 371 …noundef %a, float noundef %b) local_unnamed_addr #0 noinline optnone "zero-call-used-regs"="used" { [all …]
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