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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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cd9a5cfd |
| 23-Jul-2022 |
Dmitri Gribenko <[email protected]> |
Use the range-based overload of llvm::sort where possible
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D130403
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1 |
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| #
c34698a8 |
| 03-Feb-2022 |
Pavel Labath <[email protected]> |
[lldb] Rename Logging.h to LLDBLog.h and clean up includes
Most of our code was including Log.h even though that is not where the
"lldb" log channel is defined (Log.h defines the generic logging
inf
[lldb] Rename Logging.h to LLDBLog.h and clean up includes
Most of our code was including Log.h even though that is not where the
"lldb" log channel is defined (Log.h defines the generic logging
infrastructure). This worked because Log.h included Logging.h, even
though it should.
After the recent refactor, it became impossible the two files include
each other in this direction (the opposite inclusion is needed), so this
patch removes the workaround that was put in place and cleans up all
files to include the right thing. It also renames the file to LLDBLog to
better reflect its purpose.
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Revision tags: llvmorg-15-init |
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a007a6d8 |
| 31-Jan-2022 |
Pavel Labath <[email protected]> |
[lldb] Convert "LLDB" log channel to the new API
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Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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| #
1bd258fd |
| 09-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] [DynamicRegisterInfo] Remove AddRegister() and make Finalize() protected
Now that AddRegister() is no longer used, remove it. While at it,
we can also make Finalize() protected as all suppor
[lldb] [DynamicRegisterInfo] Remove AddRegister() and make Finalize() protected
Now that AddRegister() is no longer used, remove it. While at it,
we can also make Finalize() protected as all supported API methods
call it internally.
Differential Revision: https://reviews.llvm.org/D111498
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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| #
f290efc3 |
| 27-Aug-2021 |
Michał Górny <[email protected]> |
[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support
[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.
Differential Revision: https://reviews.llvm.org/D108937
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| #
ee11612e |
| 19-Oct-2021 |
Michał Górny <[email protected]> |
Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*"
This reverts commit 5352ea4a721ef252129994111b83dc350ecc71da. It seems
to have broken the arm buildbot.
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| #
5352ea4a |
| 27-Aug-2021 |
Michał Górny <[email protected]> |
[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support
[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*
gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.
Differential Revision: https://reviews.llvm.org/D108937
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| #
0d1705a9 |
| 09-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] [DynamicRegisterInfo] Support value_regs with offset
Support specifying an offset for value_regs[0], and add the offset
to the computed derived register offset. This makes it possible to
e.g
[lldb] [DynamicRegisterInfo] Support value_regs with offset
Support specifying an offset for value_regs[0], and add the offset
to the computed derived register offset. This makes it possible to
e.g. create the "ah" register on x86.
Differential Revision: https://reviews.llvm.org/D111489
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| #
66063277 |
| 08-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] [DynamicRegisterInfo] Support setting from vector<Register>
Add an overload of DynamicRegisterInfo::SetRegisterInfo() that accepts
a std::vector<Register> as an argument. This moves the conv
[lldb] [DynamicRegisterInfo] Support setting from vector<Register>
Add an overload of DynamicRegisterInfo::SetRegisterInfo() that accepts
a std::vector<Register> as an argument. This moves the conversion
from DRI::Register to RegisterInfo directly into DynamicRegisterInfo,
and avoids the necessity of creating fully-compatible intermediate
RegisterInfo instances.
While the new method could technically reuse AddRegister(), the ultimate
goal is to replace AddRegister() with SetRegisterInfo() entirely.
Differential Revision: https://reviews.llvm.org/D111435
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| #
1afda54f |
| 07-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] [Target] Make addSupplementaryRegister() work on Register vector
Move DynamicRegisterInfo::AddSupplementaryRegister() into a standalone
function working on std::vector<DynamicRegisterInfo::Re
[lldb] [Target] Make addSupplementaryRegister() work on Register vector
Move DynamicRegisterInfo::AddSupplementaryRegister() into a standalone
function working on std::vector<DynamicRegisterInfo::Register>.
Differential Revision: https://reviews.llvm.org/D111295
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| #
36195d7d |
| 08-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] [DynamicRegisterInfo] Remove non-const GetRegisterInfoAtIndex()
Differential Revision: https://reviews.llvm.org/D111408
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| #
202af507 |
| 23-Sep-2021 |
Pavel Labath <[email protected]> |
Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includ
Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.
Original commit message was:
These were added to support some mips registers on linux, but linux mips
support has now been removed due.
They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.
Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.
Differential Revision: https://reviews.llvm.org/D110914
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| #
b2c906da |
| 06-Oct-2021 |
Michael Forster <[email protected]> |
Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"
This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.
This commit should should have updated
llvm/llvm-pro
Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"
This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.
This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.
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| #
00e704bf |
| 23-Sep-2021 |
Pavel Labath <[email protected]> |
[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
These were added to support some mips registers on linux, but linux mips
support has now been removed due.
They are still r
[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo
These were added to support some mips registers on linux, but linux mips
support has now been removed due.
They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.
Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.
Differential Revision: https://reviews.llvm.org/D110914
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| #
214054f7 |
| 01-Oct-2021 |
Michał Górny <[email protected]> |
[lldb] Move DynamicRegisterInfo to public Target library
Move DynamicRegisterInfo from the internal lldbPluginProcessUtility
library to the public lldbTarget library. This is a prerequisite
towards
[lldb] Move DynamicRegisterInfo to public Target library
Move DynamicRegisterInfo from the internal lldbPluginProcessUtility
library to the public lldbTarget library. This is a prerequisite
towards ABI plugin changes that are going to pass DynamicRegisterInfo
parameters.
Differential Revision: https://reviews.llvm.org/D110942
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