| /llvm-project-15.0.7/mlir/lib/Dialect/Bufferization/Transforms/ |
| H A D | BufferOptimizations.cpp | 79 if (Operation *parentOp = region->getParentOp()) { in hasAllocationScope() local
83 if (parentOp->hasTrait<OpTrait::AutomaticAllocationScope>() && in hasAllocationScope()
89 if (BufferPlacementTransformationBase::isLoop(parentOp) || in hasAllocationScope()
90 !isKnownControlFlowInterface(parentOp)) in hasAllocationScope()
189 Operation *parentOp; in findPlacementBlock() local
191 while ((parentOp = currentBlock->getParentOp()) && in findPlacementBlock()
192 (parentBlock = parentOp->getBlock()) && in findPlacementBlock()
214 if (!isKnownControlFlowInterface(parentOp) || in findPlacementBlock()
215 !state.isLegalPlacement(parentOp)) in findPlacementBlock()
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| H A D | BufferDeallocation.cpp | 349 Operation *parentOp = argRegion->getParentOp(); in introduceBlockArgCopy() local
352 !(regionInterface = dyn_cast<RegionBranchOpInterface>(parentOp))) in introduceBlockArgCopy()
382 Value operand = parentOp->getOperand(operandIndex); in introduceBlockArgCopy()
386 auto clone = introduceCloneBuffers(operand, parentOp); in introduceBlockArgCopy()
390 parentOp->setOperand(operandIndex, *clone); in introduceBlockArgCopy()
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| /llvm-project-15.0.7/mlir/lib/Dialect/OpenMP/IR/ |
| H A D | OpenMPDialect.cpp | 961 Operation *parentOp = (*this)->getParentOp(); in verify() local
963 if (!parentOp) { in verify()
969 !isa<ParallelOp>(parentOp)) { in verify()
974 if (!isa<WsLoopOp>(parentOp)) { in verify()
978 if (cast<WsLoopOp>(parentOp).nowaitAttr()) { in verify()
988 if (!(isa<SectionsOp>(parentOp) || isa<SectionOp>(parentOp))) { in verify()
1007 Operation *parentOp = (*this)->getParentOp(); in verify() local
1009 if (!parentOp) { in verify()
1015 !(isa<ParallelOp>(parentOp))) { in verify()
1020 !isa<WsLoopOp>(parentOp)) { in verify()
[all …]
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| /llvm-project-15.0.7/mlir/lib/Dialect/NVGPU/Transforms/ |
| H A D | OptimizeSharedMemory.cpp | 137 getShmReadAndWriteOps(Operation *parentOp, Value shmMemRef, in getShmReadAndWriteOps() argument
140 parentOp->walk([&](Operation *op) { in getShmReadAndWriteOps()
173 mlir::nvgpu::optimizeSharedMemoryReadsAndWrites(Operation *parentOp, in optimizeSharedMemoryReadsAndWrites() argument
183 parentOp->walk([&](memref::SubViewOp subView) { hasSubView = true; }); in optimizeSharedMemoryReadsAndWrites()
202 if (failed(getShmReadAndWriteOps(parentOp, memrefValue, shmReadOps, in optimizeSharedMemoryReadsAndWrites()
209 OpBuilder builder(parentOp->getContext()); in optimizeSharedMemoryReadsAndWrites()
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| /llvm-project-15.0.7/mlir/lib/Analysis/ |
| H A D | SliceAnalysis.cpp | 97 Operation *parentOp = block->getParentOp(); in getBackwardSliceImpl() local
101 assert(parentOp->getNumRegions() == 1 && in getBackwardSliceImpl()
102 parentOp->getRegion(0).getBlocks().size() == 1); in getBackwardSliceImpl()
103 if (backwardSlice->count(parentOp) == 0) in getBackwardSliceImpl()
104 getBackwardSliceImpl(parentOp, backwardSlice, filter); in getBackwardSliceImpl()
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| H A D | CallGraph.cpp | 185 auto *parentOp = callableRegion->getParentOp(); in print() local
188 auto attrs = parentOp->getAttrDictionary(); in print()
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| /llvm-project-15.0.7/mlir/lib/Dialect/SCF/Transforms/ |
| H A D | ForToWhile.cpp | 103 auto *parentOp = getOperation(); in runOnOperation() local
104 MLIRContext *ctx = parentOp->getContext(); in runOnOperation()
107 (void)applyPatternsAndFoldGreedily(parentOp, std::move(patterns)); in runOnOperation()
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| H A D | LoopCanonicalization.cpp | 198 auto *parentOp = getOperation(); in runOnOperation() local
199 MLIRContext *ctx = parentOp->getContext(); in runOnOperation()
202 if (failed(applyPatternsAndFoldGreedily(parentOp, std::move(patterns)))) in runOnOperation()
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| H A D | LoopSpecialization.cpp | 254 auto *parentOp = getOperation(); in runOnOperation() local
255 MLIRContext *ctx = parentOp->getContext(); in runOnOperation()
258 (void)applyPatternsAndFoldGreedily(parentOp, std::move(patterns)); in runOnOperation()
261 parentOp->walk([](Operation *op) { in runOnOperation()
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| H A D | ParallelLoopTiling.cpp | 198 auto *parentOp = getOperation(); in runOnOperation() local
200 getInnermostParallelLoops(parentOp, innermostPloops); in runOnOperation()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Affine/Transforms/ |
| H A D | SuperVectorize.cpp | 958 Operation *parentOp = state.builder.getInsertionBlock()->getParentOp(); in vectorizeConstant() local
960 while (parentOp && !state.vecLoopToVecDim.count(parentOp)) in vectorizeConstant()
961 parentOp = parentOp->getParentOp(); in vectorizeConstant()
962 assert(parentOp && state.vecLoopToVecDim.count(parentOp) && in vectorizeConstant()
963 isa<AffineForOp>(parentOp) && "Expected a vectorized for op"); in vectorizeConstant()
964 auto vecForOp = cast<AffineForOp>(parentOp); in vectorizeConstant()
1656 static void vectorizeLoops(Operation *parentOp, DenseSet<Operation *> &loops, in vectorizeLoops() argument
1674 LLVM_DEBUG(dbgs() << *parentOp << "\n"); in vectorizeLoops()
1681 pattern->match(parentOp, &allMatches); in vectorizeLoops()
1812 void vectorizeAffineLoops(Operation *parentOp, DenseSet<Operation *> &loops, in vectorizeAffineLoops() argument
[all …]
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| /llvm-project-15.0.7/mlir/lib/Transforms/Utils/ |
| H A D | FoldUtils.cpp | 31 auto *parentOp = region->getParentOp(); in getInsertionRegion() local
32 if (parentOp->mightHaveTrait<OpTrait::IsIsolatedFromAbove>() || in getInsertionRegion()
33 !parentOp->getBlock()) in getInsertionRegion()
37 auto *interface = interfaces.getInterfaceFor(parentOp); in getInsertionRegion()
42 insertionBlock = parentOp->getBlock(); in getInsertionRegion()
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| /llvm-project-15.0.7/mlir/lib/IR/ |
| H A D | Region.cpp | 157 Operation *parentOp = currBlock->getParentOp(); in findAncestorBlockInRegion() local
158 if (!parentOp || !parentOp->getBlock()) in findAncestorBlockInRegion()
160 currBlock = parentOp->getBlock(); in findAncestorBlockInRegion()
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| H A D | Dominance.cpp | 73 if (Operation *parentOp = region->getParentOp()) { in getDominanceInfo() local
74 if (!parentOp->isRegistered()) { // We don't know about unregistered ops. in getDominanceInfo()
76 } else if (auto regionKindItf = dyn_cast<RegionKindInterface>(parentOp)) { in getDominanceInfo()
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| H A D | AsmPrinter.cpp | 3280 Operation *parentOp = op->getParentOp(); in print() local
3281 if (!parentOp) in print()
3283 op = parentOp; in print()
3303 Operation *parentOp = getParentOp(); in print() local
3304 if (!parentOp) { in print()
3309 while (auto *nextOp = parentOp->getParentOp()) in print()
3310 parentOp = nextOp; in print()
3312 AsmState state(parentOp); in print()
3323 Operation *parentOp = getParentOp(); in printAsOperand() local
3324 if (!parentOp) { in printAsOperand()
[all …]
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| /llvm-project-15.0.7/mlir/test/lib/IR/ |
| H A D | TestVisitors.cpp | 87 Operation *parentOp = block->getParentOp(); in testSkipErasureCallbacks() local
88 if (isa<ModuleOp>(parentOp) || isa<ModuleOp>(parentOp->getParentOp())) in testSkipErasureCallbacks()
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| /llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/IR/ |
| H A D | SparseTensorDialect.cpp | 378 auto *parentOp = (*this)->getParentOp(); in verify() local
379 if (isa<BinaryOp>(parentOp) || isa<UnaryOp>(parentOp) || in verify()
380 isa<ReduceOp>(parentOp)) in verify()
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/NVGPU/Transforms/ |
| H A D | Transforms.h | 41 mlir::LogicalResult optimizeSharedMemoryReadsAndWrites(Operation *parentOp,
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| /llvm-project-15.0.7/mlir/lib/Dialect/Affine/Utils/ |
| H A D | LoopFusionUtils.cpp | 376 auto *parentOp = forOp->getParentOp(); in promoteSingleIterReductionLoop() local
377 if (!isa<AffineForOp>(parentOp)) in promoteSingleIterReductionLoop()
380 OpBuilder b(parentOp); in promoteSingleIterReductionLoop()
401 newLoop.getResult(i + parentOp->getNumResults())); in promoteSingleIterReductionLoop()
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| /llvm-project-15.0.7/mlir/lib/Pass/ |
| H A D | IRPrinting.cpp | 115 while (auto *parentOp = topLevelOp->getParentOp()) in printIR() local
116 topLevelOp = parentOp; in printIR()
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| H A D | PassCrashRecovery.cpp | 295 while (Operation *parentOp = op->getParentOp()) { in prepareReproducerFor() local
297 op = parentOp; in prepareReproducerFor()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Affine/IR/ |
| H A D | AffineOps.cpp | 196 Operation *parentOp = region->getParentOp(); in isLegalToInline() local
197 return parentOp->hasTrait<OpTrait::AffineScope>() || in isLegalToInline()
235 Operation *parentOp = arg.getOwner()->getParentOp(); in isTopLevelValue() local
236 return parentOp && parentOp->hasTrait<OpTrait::AffineScope>(); in isTopLevelValue()
240 return parentOp && parentOp->hasTrait<OpTrait::AffineScope>(); in isTopLevelValue()
247 while (auto *parentOp = curOp->getParentOp()) { in getAffineScope() local
248 if (parentOp->hasTrait<OpTrait::AffineScope>()) in getAffineScope()
250 curOp = parentOp; in getAffineScope()
271 return parentOp && (parentOp->hasTrait<OpTrait::AffineScope>() || in isValidDim()
3830 auto *parentOp = (*this)->getParentOp(); in verify() local
[all …]
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/Affine/ |
| H A D | Utils.h | 113 Operation *parentOp,
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| /llvm-project-15.0.7/mlir/include/mlir/Pass/ |
| H A D | AnalysisManager.h | 305 getCachedParentAnalysis(Operation *parentOp) const { in getCachedParentAnalysis() argument
308 if (parentAM->getOperation() == parentOp) in getCachedParentAnalysis()
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| /llvm-project-15.0.7/mlir/lib/AsmParser/ |
| H A D | AsmParserState.cpp | 280 Operation *parentOp = result.getOwner(); in addUses() local
281 auto existingIt = impl->operationToIdx.find(parentOp); in addUses()
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