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Searched refs:opB (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/mlir/lib/Dialect/Affine/Utils/
H A DLoopFusionUtils.cpp67 static Operation *getFirstDependentOpInRange(Operation *opA, Operation *opB) { in getFirstDependentOpInRange() argument
78 it != Block::iterator(opB); ++it) { in getFirstDependentOpInRange()
93 static Operation *getLastDependentOpInRange(Operation *opA, Operation *opB) { in getLastDependentOpInRange() argument
97 getLoadAndStoreMemRefAccesses(opB, values); in getLastDependentOpInRange()
105 for (Block::reverse_iterator it = std::next(Block::reverse_iterator(opB)); in getLastDependentOpInRange()
121 if (llvm::is_contained(loops, cast<AffineForOp>(opB))) { in getLastDependentOpInRange()
/llvm-project-15.0.7/mlir/test/mlir-tblgen/
H A Drewriter-errors.td65 def : Pat<(OpB:$opB $val, $attr), (OpA $val, $val), [(AnyInteger $opB, $val)]>;
/llvm-project-15.0.7/mlir/lib/Conversion/VectorToGPU/
H A DVectorToGPU.cpp673 Value opB = valueMapping.find(op.getRhs())->second; in convertContractOp() local
676 opA, opB, opC); in convertContractOp()
685 Value opB = valueMapping.find(op.getRhs())->second; in convertContractOpToMmaSync() local
691 op.getLoc(), opC.getType(), opA, opB, opC, b.getI64ArrayAttr({m, n, k})); in convertContractOpToMmaSync()
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dwiden_shuffle-1.ll58 ; opA with opB, the DAG will produce new operations with opA.
/llvm-project-15.0.7/mlir/lib/Conversion/GPUToNVVM/
H A DWmmaOpsToNvvm.cpp231 unpackOp(adaptor.opB()); in matchAndRewrite()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrFormats.td1287 class T1LoadStore<bits<4> opA, bits<3> opB> : Encoding16 {
1289 let Inst{11-9} = opB;
1291 class T1LdStSP<bits<3> opB> : T1LoadStore<0b1001, opB>; // SP relative
1314 class T1pILdStEncodeImm<bits<4> opA, bit opB, dag oops, dag iops, AddrMode am,
1318 T1LoadStore<opA, {opB,?,?}> {
H A DARMInstrNEON.td5651 def : Pat<(v8i16 (abs (sub (zext (v8i8 DPR:$opA)), (zext (v8i8 DPR:$opB))))),
5652 (VABDLuv8i16 DPR:$opA, DPR:$opB)>;
5653 def : Pat<(v4i32 (abs (sub (zext (v4i16 DPR:$opA)), (zext (v4i16 DPR:$opB))))),
5654 (VABDLuv4i32 DPR:$opA, DPR:$opB)>;
5666 def : Pat<(xor (v2i64 (abd_shr (v2i32 DPR:$opA), (v2i32 DPR:$opB), 63)),
5668 (zext (v2i32 DPR:$opB))),
5669 (abd_shr (v2i32 DPR:$opA), (v2i32 DPR:$opB), 63)))),
5670 (VABDLuv2i64 DPR:$opA, DPR:$opB)>;
/llvm-project-15.0.7/mlir/include/mlir/Dialect/GPU/IR/
H A DGPUOps.td1171 Arg<MMAMatrixOf<[F16, F32]>>:$opB,
1177 $opA`,` $opB`,` $opC attr-dict `:` type($opA)`,` type($opB) `->` type($res)
/llvm-project-15.0.7/mlir/lib/Dialect/GPU/IR/
H A DGPUDialect.cpp1226 opTypes.push_back(opB().getType().cast<MMAMatrixType>()); in verify()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td4278 (zext (v8i8 V64:$opB))))),
4279 (UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
4284 (UABDLv8i8_v8i16 V64:$opA, V64:$opB)>;
4287 (UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
4292 (UABDLv16i8_v8i16 V128:$opA, V128:$opB)>;
4294 (zext (v4i16 V64:$opB))))),
4295 (UABDLv4i16_v4i32 V64:$opA, V64:$opB)>;
4298 (UABDLv8i16_v4i32 V128:$opA, V128:$opB)>;
4300 (zext (v2i32 V64:$opB))))),
4301 (UABDLv2i32_v2i64 V64:$opA, V64:$opB)>;
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