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Searched refs:no_shift (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFastISel.cpp2648 /* 1 bit sext */ { { ARM::tASRri , 0, ARM_AM::no_shift, 31 }, in ARMEmitIntExt()
2650 /* 8 bit sext */ { { ARM::tASRri , 0, ARM_AM::no_shift, 24 }, in ARMEmitIntExt()
2652 /* 16 bit sext */ { { ARM::tASRri , 0, ARM_AM::no_shift, 16 }, in ARMEmitIntExt()
2658 /* 1 bit sext */ { { ARM::KILL , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2660 /* 8 bit sext */ { { ARM::SXTB , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2662 /* 16 bit sext */ { { ARM::SXTH , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2666 /* 1 bit sext */ { { ARM::KILL , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2668 /* 8 bit sext */ { { ARM::t2SXTB , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2670 /* 16 bit sext */ { { ARM::t2SXTH , 0, ARM_AM::no_shift, 0 }, in ARMEmitIntExt()
2696 assert(((Shift == ARM_AM::no_shift) == (Opc != ARM::MOVsi)) && in ARMEmitIntExt()
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H A DARMSelectionDAGInfo.h25 default: return ARM_AM::no_shift; in getShiftOpcForNode()
H A DARMISelDAGToDAG.cpp612 if (ShOpcVal == ARM_AM::no_shift) return false; in SelectImmShifterOperand()
636 if (ShOpcVal == ARM_AM::no_shift) return false; in SelectRegShifterOperand()
761 if (ShOpcVal != ARM_AM::no_shift) { in SelectLdStSOReg()
771 ShOpcVal = ARM_AM::no_shift; in SelectLdStSOReg()
774 ShOpcVal = ARM_AM::no_shift; in SelectLdStSOReg()
783 if (ShOpcVal != ARM_AM::no_shift) { in SelectLdStSOReg()
794 ShOpcVal = ARM_AM::no_shift; in SelectLdStSOReg()
797 ShOpcVal = ARM_AM::no_shift; in SelectLdStSOReg()
836 if (ShOpcVal != ARM_AM::no_shift) { in SelectAddrMode2OffsetReg()
845 ShOpcVal = ARM_AM::no_shift; in SelectAddrMode2OffsetReg()
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H A DARMSchedule.td168 class CheckAM2NoShift<int n> : CheckImmOperand_s<n, "ARM_AM::no_shift">;
H A DARMLoadStoreOptimizer.cpp1555 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1585 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
H A DARMFrameLowering.cpp1672 MIB.addImm(ARM_AM::getAM2Opc(ARM_AM::add, 4, ARM_AM::no_shift)); in emitPopInst()
H A DARMISelLowering.cpp4727 } else if ((ARM_AM::getShiftOpcForNode(LHS.getOpcode()) != ARM_AM::no_shift) && in getARMCmp()
4728 (ARM_AM::getShiftOpcForNode(RHS.getOpcode()) == ARM_AM::no_shift)) { in getARMCmp()
19523 if (ShOpcVal != ARM_AM::no_shift) { in getARMIndexedAddressParts()
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h28 no_shift = 0, enumerator
H A DARMInstPrinter.cpp55 if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm)) in printRegImmShift()
H A DARMMCCodeEmitter.cpp248 case ARM_AM::no_shift: in getShiftOp()
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1625 if (Memory.ShiftType != ARM_AM::no_shift) return false; in isAddrMode3()
1718 if (Memory.ShiftType == ARM_AM::no_shift) in isT2MemRegOffset()
1895 if (shift == 0 && Memory.ShiftType != ARM_AM::no_shift) in isMemRegRQOffset()
2967 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
2990 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
3962 if (Memory.ShiftType != ARM_AM::no_shift) { in print()
3973 if (PostIdxReg.ShiftTy != ARM_AM::no_shift) in print()
4157 .Default(ARM_AM::no_shift); in tryParseShiftRegister()
4159 if (ShiftTy == ARM_AM::no_shift) in tryParseShiftRegister()
5664 ARM_AM::ShiftOpc ShiftTy = ARM_AM::no_shift; in parsePostIdxReg()
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