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/llvm-project-15.0.7/llvm/test/MC/AArch64/SVE/
H A Dmsb.s12 msb z0.b, p7/m, z1.b, z31.b label
18 msb z0.h, p7/m, z1.h, z31.h label
24 msb z0.s, p7/m, z1.s, z31.s label
30 msb z0.d, p7/m, z1.d, z31.d label
46 msb z0.d, p7/m, z1.d, z31.d label
58 msb z0.d, p7/m, z1.d, z31.d label
H A Dmsb-diagnostics.s7 msb z0.h, p8/m, z1.h, z2.h label
16 msb z0.s, p7/m, z1.h, z2.h label
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dstd-byte.cpp29 extern "C" void test1(::byte *b, ::my::byte *mb, ::my::std::byte *msb) { in test1() argument
32 *msb = ::my::std::byte{0}; in test1()
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dstore-widen-negv.ll6 %msb = getelementptr inbounds [4 x i8], [4 x i8]* %ptr, i32 0, i32 3
8 store i8 0, i8* %msb
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dsve-int-mad-pred.ll49 ; CHECK: msb z0.b, p0/m, z1.b, z2.b
51 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.msb.nxv16i8(<vscale x 16 x i1> %pg,
60 ; CHECK: msb z0.h, p0/m, z1.h, z2.h
62 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.msb.nxv8i16(<vscale x 8 x i1> %pg,
71 ; CHECK: msb z0.s, p0/m, z1.s, z2.s
73 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.msb.nxv4i32(<vscale x 4 x i1> %pg,
82 ; CHECK: msb z0.d, p0/m, z1.d, z2.d
84 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.msb.nxv2i64(<vscale x 2 x i1> %pg,
187 declare <vscale x 8 x i16> @llvm.aarch64.sve.msb.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>,<v…
188 declare <vscale x 4 x i32> @llvm.aarch64.sve.msb.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>,<v…
[all …]
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td403 : CSKY32Inst<AddrModeNone, 0x31, outs, ins, op #"\t$rz, $rx, $msb, $lsb",
407 bits<5> msb;
412 let Inst{9 - 5} = msb; // msb
421 bits<5> msb;
426 let Inst{9 - 5} = msb;
432 class I_5_XZ_U2<bits<6> sop, bits<5> lsb, bits<5> msb, dag outs, dag ins,
440 let Inst{9 - 5} = msb; // msb
460 class I_5_XZ_US<bits<6> sop, bits<5> lsb, bits<5> msb, string op,
462 : I_5_XZ_U2<sop, lsb, msb, (outs GPR:$rz), (ins GPR:$rx), op,
465 class I_5_XZ_UZ<bits<6> sop, bits<5> lsb, bits<5> msb, string op, int v>
[all …]
H A DCSKYInstrInfo.td573 def SEXT32 : I_5_XZ_U<0x16, (outs GPR:$rz), (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "sext32", []>;
580 def ZEXT32 : I_5_XZ_U<0x15, (outs GPR:$rz), (ins GPR:$rx, uimm5:$msb, uimm5:$lsb), "zext32",[]>;
583 …def INS32 : I_5_XZ_INS<0b010111, (outs GPR:$rz), (ins GPR:$rZ, GPR:$rx, uimm5_msb_size:$msb, uimm5…
/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/
H A Dmisc.mir87 # opcode{11-1} | msb |opcode{0}| lsb | rj | rd
115 # opcode | msb | lsb | rj | rd
H A Dbstrins_d.ll11 ;; R = BSTRINS X, Y, msb, lsb
39 ;; R = BSTRINS X, Y, msb, lsb
67 ;; R = BSTRINS X, (srl (and Y, mask1), lsb), msb, lsb
123 ;; R = BSTRINS X, (const >> lsb), msb, lsb
H A Dbstrins_w.ll11 ;; R = BSTRINS X, Y, msb, lsb
39 ;; R = BSTRINS X, Y, msb, lsb
67 ;; R = BSTRINS X, (srl (and Y, mask1), lsb), msb, lsb
135 ;; R = BSTRINS X, (const >> lsb), msb, lsb
/llvm-project-15.0.7/libc/src/__support/
H A Dstr_to_float.h152 BitsType msb = static_cast<BitsType>(high64(final_approx) >> (BITS_IN_MANTISSA - 1)); in eisel_lemire() local
154 (msb + BITS_IN_MANTISSA - in eisel_lemire()
156 exp2 -= static_cast<uint32_t>(1 ^ msb); // same as !msb in eisel_lemire()
257 BitsType msb = final_approx_upper >> (BITS_IN_MANTISSA - 1); variable
260 (msb + BITS_IN_MANTISSA -
262 exp2 -= static_cast<uint32_t>(1 ^ msb); // same as !msb
/llvm-project-15.0.7/llvm/test/CodeGen/NVPTX/
H A Dglobal-variable-big.ll9 ; (lsb) 0x0102'0304'0506...0F10 (msb)
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp122 uint64_t msb = N.getConstantOperandVal(1), lsb = N.getConstantOperandVal(2); in selectShiftMask() local
123 if (lsb == 0 && Log2_32(ShiftWidth) <= msb + 1) { in selectShiftMask()
H A DLoongArchISelLowering.cpp413 uint64_t lsb, msb; in performANDCombine() local
459 msb = lsb + SMLen - 1; in performANDCombine()
461 DAG.getConstant(msb, DL, GRLenVT), in performANDCombine()
/llvm-project-15.0.7/llvm/test/MC/LoongArch/Basic/Integer/
H A Dinvalid64.s71 # CHECK: :[[#@LINE+1]]:21: error: msb is less than lsb
75 # CHECK: :[[#@LINE+1]]:22: error: msb is less than lsb
H A Dinvalid.s185 # CHECK: :[[#@LINE+1]]:21: error: msb is less than lsb
189 # CHECK: :[[#@LINE+1]]:22: error: msb is less than lsb
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiInstrFormats.td416 // opcode Rd addr 5msb's address 16 lsb's
429 bits<5> msb;
434 let Inst{22 - 18} = msb;
447 // opcode Rd const 5msb's constant 16 lsb's
457 bits<5> msb;
462 let Inst{22 - 18} = msb;
503 bits<5> msb;
H A DLanaiInstrInfo.td549 let msb = src{20-16};
587 let msb = imm{20-16};
648 let msb = dst{20-16};
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dshrink-const.ll5 ; If targetShrinkDemandedConstant extends xor/or constants ensure it extends from the msb of the ac…
/llvm-project-15.0.7/flang/lib/Evaluate/
H A Dreal.cpp231 bool msb{false}; in Divide() local
241 if (NextQuotientBit(top, msb, divisor)) { in Divide()
245 bool guard{NextQuotientBit(top, msb, divisor)}; in Divide()
246 bool round{NextQuotientBit(top, msb, divisor)}; in Divide()
247 bool sticky{msb || !top.IsZero()}; in Divide()
/llvm-project-15.0.7/flang/include/flang/Evaluate/
H A Dreal.h397 Fraction &top, bool &msb, const Fraction &divisor) { in NextQuotientBit() argument
398 bool greaterOrEqual{msb || top.CompareUnsigned(divisor) != Ordering::Less}; in NextQuotientBit()
404 msb = doubled.carry; in NextQuotientBit()
/llvm-project-15.0.7/mlir/lib/Conversion/MathToSPIRV/
H A DMathToSPIRV.cpp150 Value msb = rewriter.create<spirv::GLFindUMsbOp>(loc, input); in matchAndRewrite() local
155 Value subMsb = rewriter.create<spirv::ISubOp>(loc, val31, msb); in matchAndRewrite()
/llvm-project-15.0.7/llvm/docs/
H A DXRayFDRFormat.rst189 of MetadataRecords. Within this byte, little endian machines use lsb to msb
190 ordering and big endian machines use msb to lsb ordering.
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp1704 uint32_t msb = (32 - countLeadingZeros (v)) - 1; in getBitfieldInvertedMaskOpValue() local
1705 assert(v != 0 && lsb < 32 && msb < 32 && "Illegal bitfield mask!"); in getBitfieldInvertedMaskOpValue()
1706 return lsb | (msb << 5); in getBitfieldInvertedMaskOpValue()
/llvm-project-15.0.7/libclc/generic/lib/math/
H A Dsincos_helpers.cl255 // Get 2 lsb of int part and msb of fraction
263 // Subtract 1 if msb of fraction is 1, i.e. fraction >= 0.5

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