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Searched refs:mbb (Results 1 – 20 of 20) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DSlotIndexes.h470 SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
471 return getMBBRange(mbb).first;
480 SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
481 return getMBBRange(mbb).second;
609 void insertMBBInMaps(MachineBasicBlock *mbb) {
610 assert(mbb != &mbb->getParent()->front() &&
612 auto prevMBB = std::prev(MachineFunction::iterator(mbb));
619 mbb->empty() ? endEntry
620 : getInstructionIndex(mbb->front()).listEntry();
629 assert(unsigned(mbb->getNumber()) == MBBRanges.size() &&
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H A DLiveIntervals.h230 SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const { in getMBBStartIdx() argument
231 return Indexes->getMBBStartIdx(mbb); in getMBBStartIdx()
235 SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const { in getMBBEndIdx() argument
236 return Indexes->getMBBEndIdx(mbb); in getMBBEndIdx()
240 const MachineBasicBlock *mbb) const { in isLiveInToMBB() argument
241 return LR.liveAt(getMBBStartIdx(mbb)); in isLiveInToMBB()
245 const MachineBasicBlock *mbb) const { in isLiveOutOfMBB() argument
246 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot()); in isLiveOutOfMBB()
H A DRegisterPressure.h403 const LiveIntervals *lis, const MachineBasicBlock *mbb,
H A DSelectionDAGNodes.h1955 explicit BasicBlockSDNode(MachineBasicBlock *mbb)
1956 : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb)
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dpartial-pipeline-execution.ll10 ; Check that we can do the same with unreachable-mbb-elimination pass
11 ; RUN: llc -O3 -stop-after=unreachable-mbb-elimination %s -o %t-mbb-elim.mir
12 ; RUN: llc -O3 -start-after=unreachable-mbb-elimination %t-mbb-elim.mir -o %t3.s
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dmangle-ms-back-references.cpp27 void mbb(bool a, bool b) {} in mbb() function
41 b->mbb(false, false); in g4()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMConstantPoolValue.cpp264 const MachineBasicBlock *mbb, in ARMConstantPoolMBB() argument
270 MBB(mbb) {} in ARMConstantPoolMBB()
273 const MachineBasicBlock *mbb, in Create() argument
276 return new ARMConstantPoolMBB(C, mbb, ID, PCAdj, ARMCP::no_modifier, false); in Create()
H A DARMConstantPoolValue.h248 ARMConstantPoolMBB(LLVMContext &C, const MachineBasicBlock *mbb, unsigned id,
254 const MachineBasicBlock *mbb,
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dunreachable-mbb-phi-subreg.mir1 # RUN: llc -march=hexagon -run-pass unreachable-mbb-elimination %s -o - | FileCheck %s
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dunreachable-mbb-undef-phi.mir1 # RUN: llc -mtriple=x86_64-- %s -o - -run-pass=processimpdefs -run-pass=unreachable-mbb-elimination…
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DREADME-X86-64.txt107 JMP mbb<bb2,0x203afb0>
117 %reg1027 = PHI %reg1025, mbb<bb,0x203af10>,
118 %reg1026, mbb<bb1,0x203af60>
H A DREADME-SSE.txt164 JE mbb<cond_next204,0xa914d30>
195 JE mbb<cond_next204,0xa914d30>
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.h156 InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
H A DInstrEmitter.cpp1346 InstrEmitter::InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb, in InstrEmitter() argument
1349 : MF(mbb->getParent()), MRI(&MF->getRegInfo()), in InstrEmitter()
1352 TLI(MF->getSubtarget().getTargetLowering()), MBB(mbb), in InstrEmitter()
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/
H A Dunreachable-block-call-site.mir1 # RUN: llc -emit-call-site-info -mtriple=x86_64-pc-linux -run-pass=unreachable-mbb-elimination -o -…
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DREADME.txt41 %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>
H A DRegisterPressure.cpp266 const MachineBasicBlock *mbb, in init() argument
275 MBB = mbb; in init()
H A DRegisterCoalescer.cpp3847 MBBPriorityInfo(MachineBasicBlock *mbb, unsigned depth, bool issplit) in MBBPriorityInfo()
3848 : MBB(mbb), Depth(depth), IsSplit(issplit) {} in MBBPriorityInfo()
/llvm-project-15.0.7/llvm/test/Demangle/
H A Dms-back-references.test38 ?mbb@S@@QAEX_N0@Z
39 ; CHECK: void __thiscall S::mbb(bool, bool)
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dblock-should-not-be-in-alive-blocks.mir2 …cn-amd-amdhsa -mcpu=gfx1031 -verify-machineinstrs -start-after=unreachable-mbb-elimination -stop-a…