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/llvm-project-15.0.7/llvm/test/MC/AVR/
H A Dmodifiers.s8 ldi r24, lo8(0x42)
9 ldi r24, lo8(0x2342)
11 ldi r24, lo8(0x23)
12 ldi r24, hi8(0x2342)
23 ldi r24, lo8(bar)
24 ldi r24, hi8(bar)
34 ldi r24, lo8(foo)
46 ldi r24, -lo8(foo)
55 ldi r24, hi8(foo)
67 ldi r24, -hi8(foo)
[all …]
H A Drelocations.s10 ldi r21, SYMBOL+3 label
39 ldi r24, lo8(bar+3) label
40 ldi r16, +lo8(abc) label
46 ldi r30, hi8(abc) label
47 ldi r16, +hi8(abc) label
52 ldi r16, -lo8(abc) label
57 ldi r16, -hi8(abc) label
63 ldi r16, hh8(foo) label
64 ldi r16, +hh8(foo) label
69 ldi r16, -hh8(foo) label
[all …]
H A Dinst-ldi.s6 ldi r16, 241
7 ldi r29, 190
8 ldi r22, 172
9 ldi r27, 92
10 ldi r21, SYMBOL+3
12 ; CHECK: ldi r16, 241 ; encoding: [0x01,0xef]
20 ; CHECK-INST: ldi r16, 241
21 ; CHECK-INST: ldi r29, 190
22 ; CHECK-INST: ldi r22, 172
23 ; CHECK-INST: ldi r27, 92
[all …]
H A Dinst-ser.s11 ; CHECK: ldi r16, 255 ; encoding: [0x0f,0xef]
12 ; CHECK: ldi r31, 255 ; encoding: [0xff,0xef]
13 ; CHECK: ldi r27, 255 ; encoding: [0xbf,0xef]
14 ; CHECK: ldi r31, 255 ; encoding: [0xff,0xef]
16 ; CHECK-INST: ldi r16, 255
17 ; CHECK-INST: ldi r31, 255
18 ; CHECK-INST: ldi r27, 255
19 ; CHECK-INST: ldi r31, 255
H A Dhex-immediates.s5 ; DEC: ldi r24, 66
6 ; HEX: ldi r24, 0x42
7 ldi r24, 0x42
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/calling-conv/c/
H A Dcall.ll13 ; CHECK: ldi r24, 64
20 ; CHECK: ldi r20, 4
21 ; CHECK-NEXT: ldi r21, 3
22 ; CHECK-NEXT: ldi r22, 2
23 ; CHECK-NEXT: ldi r23, 1
31 ; CHECK: ldi r24, 1
32 ; CHECK-NEXT: ldi r22, 2
33 ; CHECK-NEXT: ldi r20, 3
41 ; CHECK: ldi r22, 4
54 ; CHECK: ldi r18, 8
[all …]
H A Dcall_aggr.ll10 ; CHECK: ldi r20, 64
21 ; CHECK: ldi r22, 1
22 ; CHECK-NEXT: ldi r23, 2
23 ; CHECK-NEXT: ldi r24, 3
24 ; CHECK-NEXT: ldi r25, 4
31 ; CHECK: ldi r18, 4
32 ; CHECK-NEXT: ldi r19, 3
33 ; CHECK-NEXT: ldi r20, 2
34 ; CHECK-NEXT: ldi r21, 1
44 ; CHECK: ldi r20, 64
[all …]
H A Dreturn.ll5 ; CHECK: ldi r24, 64
11 ; CHECK: ldi r24, 0
12 ; CHECK-NEXT: ldi r25, 4
18 ; CHECK: ldi r22, 78
19 ; CHECK-NEXT: ldi r23, 97
20 ; CHECK-NEXT: ldi r24, 188
21 ; CHECK-NEXT: ldi r25, 0
27 ; CHECK: ldi r18, 0
28 ; CHECK-NEXT: ldi r19, 255
H A Dreturn_aggr.ll8 ; CHECK: ldi r22, 64
21 ; CHECK: ldi r18, 4
22 ; CHECK-NEXT: ldi r19, 3
23 ; CHECK-NEXT: ldi r20, 2
24 ; CHECK-NEXT: ldi r21, 1
25 ; CHECK-NEXT: ldi r22, 0
26 ; CHECK-NEXT: ldi r23, 8
/llvm-project-15.0.7/lld/test/ELF/
H A Davr-reloc.s9 ; CHECK: ldi r20, 0x78
10 ; CHECK-NEXT: ldi r20, 0x56
11 ; CHECK-NEXT: ldi r20, 0x34
12 ; CHECK-NEXT: ldi r20, 0x12
13 ; CHECK-NEXT: ldi r20, 0x3c
14 ; CHECK-NEXT: ldi r20, 0x2b
15 ; CHECK-NEXT: ldi r20, 0x1a
16 ; CHECK-NEXT: ldi r20, 0xff
26 ldi r20, b+225 label
30 ; CHECK: ldi r20, 0x88
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AVR/
H A Dcall.ll21 ; CHECK: ldi r24, 12
24 ; CHECK: ldi r24, 12
25 ; CHECK: ldi r22, 13
26 ; CHECK: ldi r20, 14
48 ; CHECK: ldi r24, 1
49 ; CHECK: ldi r25, 2
50 ; CHECK: ldi r22, 2
51 ; CHECK: ldi r23, 2
76 ; CHECK: ldi r22, 64
79 ; CHECK: ldi r25, 2
[all …]
H A Ddirectmem.ll21 ; CHECK: ldi [[REG:r[0-9]+]], 6
36 ; CHECK: ldi [[REG1:r[0-9]+]], 3
38 ; CHECK: ldi [[REG3:r[0-9]+]], 1
39 ; CHECK: ldi [[REG2:r[0-9]+]], 2
68 ; CHECK: ldi [[REG1:r[0-9]+]], 187
69 ; CHECK: ldi [[REG2:r[0-9]+]], 170
87 ; CHECK: ldi [[REG1:r[0-9]+]], 221
88 ; CHECK: ldi [[REG2:r[0-9]+]], 170
92 ; CHECK: ldi [[REG1:r[0-9]+]], 204
93 ; CHECK: ldi [[REG2:r[0-9]+]], 170
[all …]
H A Deor.ll14 ; CHECK: ldi r25, 5
30 ; CHECK: ldi r18, 210
31 ; CHECK: ldi r19, 4
50 ; CHECK: ldi r18, 210
51 ; CHECK: ldi r19, 4
74 ; CHECK: ldi r30, 253
75 ; CHECK: ldi r31, 255
79 ; CHECK: ldi r31, 88
82 ; CHECK: ldi r30, 76
83 ; CHECK: ldi r31, 73
[all …]
H A Dreturn.ll15 ; CHECK: ldi r24, 5
34 ; CHECK: ldi r24, 57
35 ; CHECK: ldi r25, 48
54 ; CHECK: ldi r22, 21
55 ; CHECK: ldi r23, 205
56 ; CHECK: ldi r24, 91
57 ; CHECK: ldi r25, 7
77 ; CHECK: ldi r18, 204
80 ; CHECK: ldi r21, 37
81 ; CHECK: ldi r22, 25
[all …]
H A Dvarargs.ll43 ; CHECK: ldi [[REG1:r[0-9]+]], 191
44 ; CHECK: ldi [[REG2:r[0-9]+]], 223
47 ; CHECK: ldi [[REG1:r[0-9]+]], 189
48 ; CHECK: ldi [[REG2:r[0-9]+]], 205
51 ; CHECK: ldi [[REG1:r[0-9]+]], 205
52 ; CHECK: ldi [[REG2:r[0-9]+]], 171
H A Dicall-func-pointer-correct-addr-space.ll14 ; CHECK: ldi r{{[0-9]+}}, pm_lo8(externalFunction)
15 ; CHECK-NEXT: ldi r{{[0-9]+}}, pm_hi8(externalFunction)
23 ; CHECK: ldi r{{[0-9]+}}, lo8(externalConstant)
24 ; CHECK-NEXT: ldi r{{[0-9]+}}, hi8(externalConstant)
H A Dumul.with.overflow.i16-bug.ll25 ; CHECK-DAG: ldi r20, 0
26 ; CHECK-DAG: ldi r21, 0
27 ; CHECK-DAG: ldi r18, 11
28 ; CHECK-DAG: ldi r19, 0
H A Dblock-address-is-in-progmem-space.ll19 ; CHECK: ldi r30, .Ltmp0+2
20 ; CHECK-NEXT: ldi r31, .Ltmp0+4
35 ; CHECK: ldi r30, .Ltmp1+2
36 ; CHECK-NEXT: ldi r31, .Ltmp1+4
/llvm-project-15.0.7/llvm/test/MC/Mips/msa/
H A Dtest_i10.s3 # CHECK: ldi.b $w8, 198 # encoding: [0x7b,0x06,0x32,0x07]
4 # CHECK: ldi.h $w20, 313 # encoding: [0x7b,0x29,0xcd,0x07]
5 # CHECK: ldi.w $w24, 492 # encoding: [0x7b,0x4f,0x66,0x07]
6 # CHECK: ldi.d $w27, -180 # encoding: [0x7b,0x7a,0x66,0xc7]
8 ldi.b $w8, 198
9 ldi.h $w20, 313
10 ldi.w $w24, 492
11 ldi.d $w27, -180
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/
H A Di10.ll102 declare <16 x i8> @llvm.mips.ldi.b(i32)
105 ; CHECK-DAG: ldi.b {{\$w[0-9]}}, 3
106 ; CHECK-DAG: ldi.b {{\$w[0-9]}}, -3
120 declare <8 x i16> @llvm.mips.ldi.h(i32)
123 ; CHECK-DAG: ldi.h {{\$w[0-9]}}, 3
124 ; CHECK-DAG: ldi.h {{\$w[0-9]}}, -3
138 declare <4 x i32> @llvm.mips.ldi.w(i32)
141 ; CHECK-DAG: ldi.w {{\$w[0-9]}}, 3
142 ; CHECK-DAG: ldi.w {{\$w[0-9]}}, -3
159 ; CHECK-DAG: ldi.d {{\$w[0-9]}}, 3
[all …]
H A Dremat-ldi.ll4 ; Test that checks if spill for ldi can be avoided and instruction will be
16 ; CHECK-NEXT: ldi.b $w0, 1
21 ; CHECK-NEXT: ldi.b $w0, 1
41 ; CHECK-NEXT: ldi.h $w0, 2
46 ; CHECK-NEXT: ldi.h $w0, 2
66 ; CHECK-NEXT: ldi.w $w0, 3
71 ; CHECK-NEXT: ldi.w $w0, 3
91 ; CHECK-NEXT: ldi.d $w0, 4
96 ; CHECK-NEXT: ldi.d $w0, 4
H A Dshift-dagcombine.ll9 ; CHECK-DAG: ldi.w [[R1:\$w[0-9]+]], 1
17 ; CHECK-DAG: ldi.w [[R1:\$w[0-9]+]], -2
32 ; CHECK-DAG: ldi.w [[R1:\$w[0-9]+]], 1
56 ; CHECK-DAG: ldi.w [[R1:\$w[0-9]+]], 8
64 ; CHECK-DAG: ldi.w [[R1:\$w[0-9]+]], -8
/llvm-project-15.0.7/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRAsmBackend.cpp195 namespace ldi { namespace
215 ldi::fixup(Size, Fixup, Value, Ctx); in lo8()
221 ldi::fixup(Size, Fixup, Value, Ctx); in hi8()
227 ldi::fixup(Size, Fixup, Value, Ctx); in hh8()
233 ldi::fixup(Size, Fixup, Value, Ctx); in ms8()
265 adjust::ldi::lo8(Size, Fixup, Value, Ctx); in adjustFixupValue()
270 adjust::ldi::lo8(Size, Fixup, Value, Ctx); in adjustFixupValue()
296 adjust::ldi::neg(Value); in adjustFixupValue()
304 adjust::ldi::neg(Value); in adjustFixupValue()
312 adjust::ldi::neg(Value); in adjustFixupValue()
[all …]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/Mips/msa/
H A Dtest_i10.txt3 0x7b 0x06 0x32 0x07 # CHECK: ldi.b $w8, 198
4 0x7b 0x29 0xcd 0x07 # CHECK: ldi.h $w20, 313
5 0x7b 0x4f 0x66 0x07 # CHECK: ldi.w $w24, 492
6 0x7b 0x7a 0x66 0xc7 # CHECK: ldi.d $w27, 844
/llvm-project-15.0.7/lld/test/ELF/linkerscript/
H A Davr5.test12 # RELOC: ldi r24, 2
13 # RELOC-NEXT: ldi r25, 8
31 ldi r24, lo8(def) ; Load lower byte of variable def 16-bit address to r24
32 ldi r25, hi8(def) ; Load higher byte of variable def 16-bit address to r25

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