Searched refs:isVRegCycle (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAG.h | 274 bool isVRegCycle : 1; ///< May use and def the same vreg. variable
309 : Node(node), NodeNum(nodenum), isVRegCycle(false), isCall(false), in SUnit()
320 : Instr(instr), NodeNum(nodenum), isVRegCycle(false), isCall(false), in SUnit()
330 : isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false), in SUnit()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGRRList.cpp | 2431 SU->isVRegCycle = true; in initVRegCycle()
2435 Pred.getSUnit()->isVRegCycle = true; in initVRegCycle()
2442 if (!SU->isVRegCycle) in resetVRegCycle()
2448 if (PredSU->isVRegCycle) { in resetVRegCycle()
2451 Pred.getSUnit()->isVRegCycle = false; in resetVRegCycle()
2460 if (SU->isVRegCycle) in hasVRegCycleUse()
2465 if (Pred.getSUnit()->isVRegCycle && in hasVRegCycleUse()
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| H A D | ScheduleDAGSDNodes.cpp | 93 SU->isVRegCycle = Old->isVRegCycle; in Clone()
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