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Searched refs:isSSA (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmlicm-stack-write-check.mir31 %0 = COPY $x0 ; Force isSSA = false.
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dexpand-condsets-rm-reg.mir38 %0 = COPY $r0 ; Force isSSA = false.
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64StackTaggingPreRA.cpp349 assert(MRI->isSSA()); in runOnMachineFunction()
H A DAArch64MIPeepholeOpt.cpp487 assert(MRI->isSSA() && "Expected to be run on SSA form!"); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp3241 assert(!MBB.getParent()->getRegInfo().isSSA() && in materializeImmPostRA()
3289 if (MRI->isSSA()) { in getForwardingDefMI()
3398 if (MRI.isSSA()) { in fixupIsDeadOrKill()
3502 bool PostRA = !MRI->isSSA(); in foldFrameOffset()
3712 bool PostRA = !MRI->isSSA(); in convertToImmediateForm()
4366 if (MRI.isSSA()) in isUseMIElgibleForForwarding()
4431 if (MRI.isSSA()) in isRegElgibleForForwarding()
4520 bool PostRA = !MRI->isSSA(); in simplifyToLI()
4757 bool PostRA = !MRI->isSSA(); in transformToNewImmFormFedByAdd()
4892 bool PostRA = !MRI.isSSA(); in transformToImmFormFedByAdd()
[all …]
H A DPPCReduceCRLogicals.cpp147 assert(MRI->isSSA() && "Can only do this while the function is in SSA form."); in splitMBB()
/llvm-project-15.0.7/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp331 static bool isSSA(const MachineFunction &MF) { in isSSA() function
378 if (isSSA(MF)) in computeFunctionProperties()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastPreTileConfig.cpp685 assert(MRI->isSSA()); in runOnMachineFunction()
H A DX86DomainReassignment.cpp739 assert(MRI->isSSA() && "Expected MIR to be in SSA form"); in runOnMachineFunction()
H A DX86AvoidStoreForwardingBlocks.cpp670 assert(MRI->isSSA() && "Expected MIR to be in SSA form"); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h183 bool isSSA() const { in isSSA() function
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLiveVariables.cpp625 if (!MRI->isSSA()) in runOnMachineFunction()
H A DMachineLICM.cpp343 PreRegAlloc = MRI->isSSA(); in runOnMachineFunction()
H A DIfConversion.cpp458 PreRegAlloc = MRI->isSSA(); in INITIALIZE_PASS_DEPENDENCY()
H A DMachineVerifier.cpp2428 if (MRI->isSSA() && Reg.isVirtual() && in checkLiveness()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp2193 assert(MRI.isSSA()); in expandMovDPP64()
8020 assert(MRI.isSSA()); in getVRegSubRegDef()
8057 assert(MRI.isSSA() && "Must be run on SSA"); in execMayBeModifiedBeforeUse()
8089 assert(MRI.isSSA() && "Must be run on SSA"); in execMayBeModifiedBeforeAnyUse()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp1986 assert (MRI.isSSA() && "Huge values only handled before reg-alloc ."); in loadImmediate()