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Searched refs:isDef (Results 1 – 25 of 199) sorted by relevance

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/llvm-project-15.0.7/clang/test/Index/skip-parsed-bodies/
H A Dcompile_commands.json23 …]: kind: c++-instance-method | name: method_decl | {{.*}} | isRedecl: 0 | isDef: 0 | isContainer: 0
24 …]: kind: c++-instance-method | name: method_def1 | {{.*}} | isRedecl: 0 | isDef: 1 | isContainer: 1
26 …]: kind: c++-instance-method | name: method_def2 | {{.*}} | isRedecl: 0 | isDef: 0 | isContainer: 0
31 // CHECK-NEXT: [indexDeclaration]: kind: function | name: foo1 | {{.*}} | isRedecl: 0 | isDef: 1 | …
45 // CHECK-NEXT: [indexDeclaration]: kind: function | name: foo1 | {{.*}} | isRedecl: 0 | isDef: 1 | …
47 // CHECK-NEXT: [indexDeclaration]: kind: function | name: foo2 | {{.*}} | isRedecl: 0 | isDef: 1 | …
49 …ation]: kind: c++-instance-method | name: tsmeth | {{.*}} | isRedecl: 0 | isDef: 1 | isContainer: 1
51 // CHECK: [indexDeclaration]: kind: function | name: imp_foo | {{.*}} | isRedecl: 0 | isDef: 1…
65 // CHECK-NEXT: [indexDeclaration]: kind: function | name: foo1 | {{.*}} | isRedecl: 0 | isDef: 1 | …
67 // CHECK-NEXT: [indexDeclaration]: kind: function | name: foo2 | {{.*}} | isRedecl: 0 | isDef: 1 | …
[all …]
/llvm-project-15.0.7/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDag.cpp62 if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
66 if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
70 if (E->getFromMO()->isDef() == E->getToMO()->isDef()) in writeDOTGraph()
73 if (E->getFromMO()->isDef() == E->getToMO()->isDef()) in writeDOTGraph()
75 else if (E->getFromMO()->isDef() && !E->getToMO()->isDef()) in writeDOTGraph()
H A DGIMatchDagOperands.cpp35 I.value().isDef()); in Profile()
46 if (I.isDef()) in print()
H A DGIMatchDagEdge.cpp24 return FromMO->isDef(); in isDefToUse()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DLiveIntervalCalc.cpp56 if (!MO.isDef() && !MO.readsReg()) in calculate()
73 if (MO.isDef()) in calculate()
81 if (MO.isDef() && !LI.hasSubRanges()) in calculate()
156 if (!MO.readsReg() || (IsSubRange && MO.isDef())) in extendToUses()
162 if (MO.isDef()) in extendToUses()
174 assert(!MO.isDef() && "Cannot handle PHI def of partial register."); in extendToUses()
182 if (MO.isDef()) in extendToUses()
H A DMachineOperand.cpp92 if (isDef()) in substPhysReg()
127 if (isDef()) in isRenamable()
239 void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp, in ChangeToRegister() argument
253 if (!isDef && MI && MI->isDebugInstr()) in ChangeToRegister()
257 assert(!(isDead && !isDef) && "Dead flag on non-def"); in ChangeToRegister()
258 assert(!(isKill && isDef) && "Kill flag on def"); in ChangeToRegister()
262 IsDef = isDef; in ChangeToRegister()
292 return getReg() == Other.getReg() && isDef() == Other.isDef() && in isIdenticalTo()
756 OS << (isDef() ? "implicit-def " : "implicit "); in print()
757 else if (PrintDef && isDef()) in print()
[all …]
H A DRenameIndependentSubregs.cpp180 if (!MO.isDef() && !MO.readsReg()) in findComponents()
190 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber()) in findComponents()
219 if (!MO.isDef() && !MO.readsReg()) in rewriteOperands()
224 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber()) in rewriteOperands()
346 if (!MO.isDef()) in computeMainRangesFixFlags()
H A DMachineInstrBundle.cpp156 if (MO.isDef()) { in finalizeBundle()
299 if (MO.isDef()) in AnalyzeVirtRegInBundle()
304 if (MO.isDef()) in AnalyzeVirtRegInBundle()
345 } else if (MO.isDef()) { in AnalyzePhysRegInBundle()
H A DMIRCanonicalizerPass.cpp161 if (!MO.isDef()) in rescheduleCanonically()
177 if (!MO.isDef()) in rescheduleCanonically()
344 if (!MO.isDef() && MO.isKill()) { in doDefKillClear()
349 if (MO.isDef() && MO.isDead()) { in doDefKillClear()
H A DLiveRangeEdit.cpp207 if (MO.isDef()) { in foldAsLoad()
308 if (VRM && MI->getOperand(0).isReg() && MI->getOperand(0).isDef() && in eliminateDeadDef()
334 else if (MO.isDef()) in eliminateDeadDef()
344 if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MO.isDef())) || in eliminateDeadDef()
351 if (MO.isDef()) { in eliminateDeadDef()
H A DRegisterScavenging.cpp146 assert(MO.isDef()); in determineKillsAndDefs()
222 assert(MO.isDef()); in forward()
312 if (MO.isDef()) in findSurvivorReg()
643 if (MO.isDef()) { in scavengeVReg()
734 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses"); in scavengeFrameVirtualRegsInBlock()
738 if (MO.isDef()) { in scavengeFrameVirtualRegsInBlock()
749 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses"); in scavengeFrameVirtualRegsInBlock()
H A DLiveRegUnits.cpp48 if (MOP.isDef()) in stepBackward()
67 if (!MOP.isDef() && !MOP.readsReg()) in accumulate()
H A DDeadMachineInstructionElim.cpp79 if (MO.isReg() && MO.isDef()) { in isDead()
154 if (MO.isReg() && MO.isDef()) { in eliminateDeadMI()
H A DCriticalAntiDepBreaker.cpp288 if (!MO.isDef()) continue; in ScanInstruction()
367 if (RefOper->isDef() && RefOper->isEarlyClobber()) in isNewRegClobberedByRefs()
376 if (!CheckOper.isReg() || !CheckOper.isDef() || in isNewRegClobberedByRefs()
382 if (RefOper->isDef()) in isNewRegClobberedByRefs()
627 if (MO.isDef() && Reg != AntiDepReg) in BreakAntiDependencies()
H A DImplicitNullChecks.cpp295 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
742 assert(MO.isDef() && "Expected def or use"); in insertFaultingInstr()
784 if (!MO.isReg() || !MO.isDef()) in rewriteNullChecks()
794 if (!MO.isReg() || !MO.getReg() || !MO.isDef() || MO.isDead()) in rewriteNullChecks()
H A DMachineLICM.cpp458 if (!MO.isDef()) { in ProcessMI()
580 if (!MO.isReg() || MO.isDef() || !MO.getReg()) in HoistRegionPostRA()
605 if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue; in AddToLiveIns()
856 if (MO.isDef()) in calcRegisterCost()
1020 if (!MO.isReg() || !MO.isDef()) in HasLoopPHIUse()
1089 if (!DefMO.isReg() || !DefMO.isDef()) in IsCheapInstruction()
1188 if (MO.isDef() && HasHighOperandLatency(MI, i, Reg)) { in IsProfitableToHoist()
1348 if (MO.isReg() && MO.isDef() && in EliminateCSE()
1463 if (MO.isReg() && MO.isDef() && !MO.isDead()) in Hoist()
H A DVirtRegMap.cpp569 if ((MO.readsReg() && (MO.isDef() || MO.isKill())) || in rewrite()
570 (MO.isDef() && subRegLiveThrough(MI, PhysReg))) in rewrite()
573 if (MO.isDef()) { in rewrite()
588 assert(MO.isDef()); in rewrite()
596 if (MO.isDef()) { in rewrite()
H A DLivePhysRegs.cpp52 if (MOP.isDef()) in removeDefs()
90 if (O->isDef()) { in stepForward()
295 if (!MO->isReg() || !MO->isDef() || MO->isDebug()) in recomputeLivenessFlags()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DMCInstrDescView.cpp44 bool Operand::isDef() const { return IsDef; } in isDef() function in llvm::exegesis::Operand
175 if (Op.isDef()) in create()
179 if (Op.isDef() && Op.isImplicit()) in create()
262 if (Op.isDef()) in dump()
330 if (Op.isReg() && Op.isDef() == SelectDef) { in addOperandIfAlias()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DRegBankSelect.cpp153 if (MO.isDef()) in repairReg()
174 if (MO.isDef()) { in repairReg()
246 assert(CurRegBank || MO.isDef()); in getRepairCost()
265 if (MO.isDef()) in getRepairCost()
338 assert((!MI.isPHI() || !MO.isDef()) && "Need split for phi def?"); in tryAvoidingSplit()
341 if (!MO.isDef()) { in tryAvoidingSplit()
365 assert(MI.isTerminator() && MO.isDef() && in tryAvoidingSplit()
755 bool Before = !MO.isDef(); in RepairingPlacement()
/llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/
H A DReduceRegisterDefs.cpp50 if (!MO.isReg() || !MO.isDef()) in removeDefsFromFunction()
69 if (!MO.isReg() || !MO.isDef()) in removeDefsFromFunction()
H A DReduceInstructionsMIR.cpp36 if (!MO.isReg() || !MO.isDef()) in getPrevDefOfRCInMBB()
92 if (!MO.isReg() || !MO.isDef()) in extractInstrFromFunction()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineOperand.h374 bool isDef() const { in isDef() function
769 void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,
800 static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp = false,
807 assert(!(isDead && !isDef) && "Dead flag on non-def");
808 assert(!(isKill && isDef) && "Kill flag on def");
810 Op.IsDef = isDef;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp375 if (!Op.isReg() || !Op.isDef()) in updateDeadsInRange()
502 if (Op.isDef()) { in updateDeadsInRange()
675 assert(MD.isDef()); in split()
731 if (!Op.isReg() || !Op.isDef()) in isPredicable()
767 if (!Op.isReg() || !Op.isDef()) in getReachingDefForPred()
813 if (Op.isDef() && isRefInMap(RR, Uses, Exec_Then)) in canMoveOver()
880 if (!MO.isReg() || !MO.isDef()) in predicateAt()
928 assert(!Op.isDef() && "Not expecting a def"); in renameInRange()
1007 ReferenceMap &Map = Op.isDef() ? Defs : Uses; in predicate()
1008 if (Op.isDef() && Op.isUndef()) { in predicate()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FixupBWInsts.cpp266 assert((MO.isDef() || MO.isUse()) && "Expected Def or Use only!"); in getSuperRegDestIfDead()
268 if (MO.isDef() && TRI->isSuperRegisterEq(OrigDestReg, MO.getReg())) in getSuperRegDestIfDead()
350 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg)) in tryReplaceCopy()

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