Searched refs:isCoalescableExtInstr (Results 1 – 10 of 10) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 53 bool isCoalescableExtInstr(const MachineInstr &MI, Register &SrcReg,
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| H A D | AArch64InstrInfo.cpp | 1023 bool AArch64InstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr() function in AArch64InstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 189 bool isCoalescableExtInstr(const MachineInstr &MI, Register &SrcReg,
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| H A D | X86InstrInfo.cpp | 94 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr() function in X86InstrInfo
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 493 bool isCoalescableExtInstr(const MachineInstr &MI,
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| H A D | PPCInstrInfo.cpp | 1054 bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr() function in PPCInstrInfo
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 248 virtual bool isCoalescableExtInstr(const MachineInstr &MI, Register &SrcReg, in isCoalescableExtInstr() function
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | crash.ll | 397 ; emitted blocks when isCoalescableExtInstr points out the opportunity.
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 465 if (!TII->isCoalescableExtInstr(MI, SrcReg, DstReg, SubIdx)) in INITIALIZE_PASS_DEPENDENCY()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 517 TII->isCoalescableExtInstr(*DefMI, SrcReg, DstReg, DefSubIdx) && in EmitSubregNode()
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