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Searched refs:isARMLowRegister (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp84 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
88 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
113 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) && in loadRegFromStackSlot()
117 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) { in loadRegFromStackSlot()
H A DThumb2SizeReduction.cpp398 if (!isARMLowRegister(Reg)) in VerifyLowRegs()
473 assert(isARMLowRegister(Rt)); in ReduceLoadStore()
474 assert(isARMLowRegister(Rn)); in ReduceLoadStore()
501 assert(isARMLowRegister(BaseReg)); in ReduceLoadStore()
557 } else if (!isARMLowRegister(BaseReg) || in ReduceLoadStore()
652 if (!isARMLowRegister(MI->getOperand(0).getReg())) in ReduceSpecial()
763 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) in ReduceTo2Addr()
764 || !isARMLowRegister(Reg2)) in ReduceTo2Addr()
788 if (Entry.LowRegs2 && !isARMLowRegister(Reg0)) in ReduceTo2Addr()
797 if (Entry.LowRegs2 && !isARMLowRegister(Reg2)) in ReduceTo2Addr()
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H A DThumbRegisterInfo.cpp110 assert((isARMLowRegister(DestReg) || DestReg.isVirtual()) && in emitLoadConstPool()
130 bool isHigh = !isARMLowRegister(DestReg) || in emitThumbRegPlusImmInReg()
131 (BaseReg != 0 && !isARMLowRegister(BaseReg)); in emitThumbRegPlusImmInReg()
144 if (!isARMLowRegister(DestReg) && !Register::isVirtualRegister(DestReg)) in emitThumbRegPlusImmInReg()
230 } else if (isARMLowRegister(DestReg)) { in emitThumbRegPlusImmediate()
240 } else if (isARMLowRegister(BaseReg)) { in emitThumbRegPlusImmediate()
H A DThumb1FrameLowering.cpp425 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitPrologue()
567 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitEpilogue()
H A DARMConstantIslandPass.cpp1837 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
1844 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
H A DARMLoadStoreOptimizer.cpp740 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && in CreateLoadStoreMulti()
H A DARMFrameLowering.cpp2671 isARMLowRegister(Reg) || in determineCalleeSaves()
2707 (!AFI->isThumb1OnlyFunction() || isARMLowRegister(Reg))) { in determineCalleeSaves()
H A DARMBaseInstrInfo.cpp5598 if (!isARMLowRegister(Reg)) in findCMPToFoldIntoCBZ()
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMBaseInfo.h160 static inline bool isARMLowRegister(unsigned Reg) { in isARMLowRegister() function
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp1731 return isARMLowRegister(Memory.BaseRegNum) && in isMemThumbRR()
10009 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10010 isARMLowRegister(Inst.getOperand(1).getReg()) && in processInstruction()
10041 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10042 isARMLowRegister(Inst.getOperand(1).getReg()) && in processInstruction()
10043 isARMLowRegister(Inst.getOperand(2).getReg()) && in processInstruction()
10078 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10079 isARMLowRegister(Inst.getOperand(1).getReg()) && in processInstruction()
10485 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
10506 if (isARMLowRegister(Inst.getOperand(0).getReg()) && in processInstruction()
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