Home
last modified time | relevance | path

Searched refs:isAGPRClass (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNPreRAOptimizations.cpp91 bool IsAGPRDst = TRI->isAGPRClass(MRI->getRegClass(Reg)); in processReg()
113 bool IsAGPRSrc = TRI->isAGPRClass(MRI->getRegClass(SrcReg)); in processReg()
233 (ST.hasGFX90AInsts() || !TRI->isAGPRClass(RC))) in runOnMachineFunction()
H A DSIRegisterInfo.h204 static bool isAGPRClass(const TargetRegisterClass *RC) { in isAGPRClass() function
H A DSIRegisterInfo.cpp442 if (ST.hasMAIInsts() && (isVGPRClass(RC) || isAGPRClass(RC))) { in getLargestLegalSuperClass()
932 if (isAGPRClass(RC) && !ST.hasGFX90AInsts()) in getCrossCopyRegClass()
1292 const bool IsAGPR = !ST.hasGFX90AInsts() && isAGPRClass(RC); in buildSpillLoadStore()
2714 if (isAGPRClass(RC)) { in getSubRegClass()
2829 return RC && isAGPRClass(RC); in isAGPR()
3039 if (isAGPRClass(&RC)) in isProperlyAlignedRC()
3059 if (isAGPRClass(RC)) in getProperlyAlignedRC()
H A DSIFixSGPRCopies.cpp270 bool IsAGPR = TRI->isAGPRClass(DstRC); in foldVGPRCopyIntoRegSequence()
837 if (AllAGPRUses && numVGPRUses && !TRI->isAGPRClass(RC0)) { in processPHINode()
H A DGCNRegPressure.cpp79 : STI->isAGPRClass(RC) in getRegKind()
H A DSIMachineFunctionInfo.cpp718 if (RC && SIRegisterInfo::isAGPRClass(RC)) { in usesAGPRs()
H A DSIInstrInfo.cpp963 if (RI.isAGPRClass(RC)) { in copyPhysReg()
964 if (ST.hasGFX90AInsts() && RI.isAGPRClass(SrcRC)) in copyPhysReg()
971 } else if (RI.hasVGPRs(RC) && RI.isAGPRClass(SrcRC)) { in copyPhysReg()
1278 if (RI.isAGPRClass(DstRC)) in getMovOpcode()
1564 : RI.isAGPRClass(RC) ? getAGPRSpillSaveOpcode(SpillSize) in storeRegToStackSlot()
1728 : RI.isAGPRClass(RC) ? getAGPRSpillRestoreOpcode(SpillSize) in loadRegFromStackSlot()
5768 VRC = RI.isAGPRClass(getOpRegClass(MI, 0)) in legalizeOperands()
5772 VRC = RI.isAGPRClass(getOpRegClass(MI, 0)) in legalizeOperands()
7231 if (RI.isAGPRClass(SrcRC)) { in getDestEquivalentVGPRClass()
7232 if (RI.isAGPRClass(NewDstRC)) in getDestEquivalentVGPRClass()
H A DSILoadStoreOptimizer.cpp1750 return TRI->isAGPRClass(getDataRegClass(*CI.I)) in getTargetRegisterClass()
H A DAMDGPURegisterBankInfo.cpp292 return TRI->isAGPRClass(&RC) ? AMDGPU::AGPRRegBank : AMDGPU::VGPRRegBank; in getRegBankFromRegClass()
H A DSIISelLowering.cpp12172 else if (SIRegisterInfo::isAGPRClass(RC)) in getRegForInlineAsmConstraint()