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Searched refs:getSubRegs (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td55 class getSubRegs<int size> {
444 list<SubRegIndex> indices = getSubRegs<size>.ret,
474 getSubRegs<size>.ret>;
554 def VGPR_64 : SIRegisterTuples<getSubRegs<2>.ret, VGPR_32, 255, 1, 2, "v">;
557 def VGPR_96 : SIRegisterTuples<getSubRegs<3>.ret, VGPR_32, 255, 1, 3, "v">;
560 def VGPR_128 : SIRegisterTuples<getSubRegs<4>.ret, VGPR_32, 255, 1, 4, "v">;
563 def VGPR_160 : SIRegisterTuples<getSubRegs<5>.ret, VGPR_32, 255, 1, 5, "v">;
566 def VGPR_192 : SIRegisterTuples<getSubRegs<6>.ret, VGPR_32, 255, 1, 6, "v">;
569 def VGPR_224 : SIRegisterTuples<getSubRegs<7>.ret, VGPR_32, 255, 1, 7, "v">;
598 def AGPR_64 : SIRegisterTuples<getSubRegs<2>.ret, AGPR_32, 255, 1, 2, "a">;
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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonGenMux.cpp127 void getSubRegs(unsigned Reg, BitVector &SRs) const;
146 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const { in getSubRegs() function in HexagonGenMux
153 getSubRegs(Reg, Set); in expandReg()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCodeGenRegisters.cpp1227 for (auto P : Reg.getSubRegs()) { in CodeGenRegBank()
1392 const CodeGenRegister::SubRegMap &SM = R.getSubRegs(); in computeComposites()
1444 const CodeGenRegister::SubRegMap &SRM1 = Reg1.getSubRegs(); in computeComposites()
1451 const CodeGenRegister::SubRegMap &SRM2 = Reg2->getSubRegs(); in computeComposites()
1774 const CodeGenRegister::SubRegMap &SRM = Reg->getSubRegs(); in normalizeWeight()
2114 const SubRegMap &SubRegs = Register.getSubRegs(); in computeRegUnitLaneMasks()
2119 if (!SubReg->getSubRegs().empty()) in computeRegUnitLaneMasks()
2243 const CodeGenRegister::SubRegMap &SRM = R->getSubRegs(); in inferSubClassWithSubReg()
2300 const CodeGenRegister *Sub = Super->getSubRegs().find(&SubIdx)->second; in inferMatchingSuperRegClass()
2470 const CodeGenRegister::SubRegMap &SRM = Super->getSubRegs(); in computeCoveredRegisters()
H A DCodeGenRegisters.h182 const SubRegMap &getSubRegs() const { in getSubRegs() function
H A DRegisterInfoEmitter.cpp1780 for (std::pair<CodeGenSubRegIndex*,CodeGenRegister*> P : R.getSubRegs()) { in debugDump()