| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 386 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 1006 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1055 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall_32()
1362 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall_64()
2173 DAG.getRegisterMask(Mask), in LowerGlobalTLSAddress()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 758 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
1275 SDValue Args[] = {Chain, Label, DAG.getRegisterMask(Mask), Chain.getValue(1)}; in lowerToTLSGeneralDynamicModel()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 683 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 748 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 595 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
1299 DAG.getRegisterMask(Mask), Glue }; in GetDynamicTLSAddr()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 739 SDValue getRegisterMask(const uint32_t *RegMask);
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1459 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 790 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1842 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
3292 Ops.push_back(DAG.getRegisterMask(Mask)); in lowerTLSGetOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3089 Ops.push_back(CLI.DAG.getRegisterMask(Mask)); in getOpndList()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6913 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
7276 DAG.getRegisterMask(Mask), Chain.getValue(1)); in LowerDarwinGlobalTLSAddress()
12292 DAG.getRegisterMask(Mask), Chain.getValue(1)); in LowerWindowsDYNAMIC_STACKALLOC()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2815 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
3554 DAG.getRegisterMask(Mask), Chain.getValue(1)); in LowerGlobalTLSAddressDarwin()
4043 SDValue RegisterMask = DAG.getRegisterMask(Mask); in LowerINTRINSIC_VOID()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 2076 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { in getRegisterMask() function in SelectionDAG
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11397 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3322 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 5556 Ops.push_back(DAG.getRegisterMask(Mask)); in buildCallOperands()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4824 Ops.push_back(DAG.getRegisterMask(RegMask)); in LowerCall()
4827 Ops.push_back(DAG.getRegisterMask(Mask)); in LowerCall()
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