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Searched refs:getRegClassIDForVecVT (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1614 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(VT); in Select()
1615 assert(RISCVTargetLowering::getRegClassIDForVecVT(SubVecContainerVT) == in Select()
1658 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(InVT); in Select()
1659 assert(RISCVTargetLowering::getRegClassIDForVecVT(SubVecContainerVT) == in Select()
H A DRISCVISelLowering.h578 static unsigned getRegClassIDForVecVT(MVT VT);
H A DRISCVISelLowering.cpp161 unsigned RCID = getRegClassIDForVecVT(ContainerVT); in RISCVTargetLowering()
1513 unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) { in getRegClassIDForVecVT() function in RISCVTargetLowering
1532 unsigned VecRegClassID = getRegClassIDForVecVT(VecVT); in decomposeSubvectorInsertExtractToSubRegs()
1533 unsigned SubRegClassID = getRegClassIDForVecVT(SubVecVT); in decomposeSubvectorInsertExtractToSubRegs()