| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVSubtarget.h | 71 const RegisterBankInfo *getRegBankInfo() const override { in getRegBankInfo() function
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| H A D | SPIRVGlobalRegistry.cpp | 172 *ST.getRegisterInfo(), *ST.getRegBankInfo()); in getOrCreateConstInt()
216 *Subtarget.getRegBankInfo()); in buildConstantInt()
291 *Subtarget.getRegBankInfo()); in getOrCreateConsIntVector()
341 *Subtarget.getRegBankInfo()); in buildGlobalVariable()
810 *ST.getRegisterInfo(), *ST.getRegBankInfo()); in getOrCreateUndef()
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| H A D | SPIRVCallLowering.cpp | 43 *STI.getRegBankInfo()); in lowerReturn()
327 *STI.getRegBankInfo()); in lowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 178 const RegisterBankInfo *getRegBankInfo() const override;
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| H A D | M68kSubtarget.cpp | 78 const RegisterBankInfo *M68kSubtarget::getRegBankInfo() const { in getRegBankInfo() function in M68kSubtarget
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 101 auto RBI = Subtarget.getRegBankInfo(); in optimizeNZCVDefs()
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| H A D | AArch64CallLowering.cpp | 1085 *MF.getSubtarget().getRegBankInfo(), *MIB, in lowerTailCall()
1212 *Subtarget.getRegBankInfo(), *MIB, MIB->getDesc(), in lowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVSubtarget.cpp | 118 const RegisterBankInfo *RISCVSubtarget::getRegBankInfo() const { in getRegBankInfo() function in RISCVSubtarget
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| H A D | RISCVSubtarget.h | 265 const RegisterBankInfo *getRegBankInfo() const override;
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetSubtargetInfo.h | 129 virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; } in getRegBankInfo() function
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.cpp | 267 const RegisterBankInfo *PPCSubtarget::getRegBankInfo() const { in getRegBankInfo() function in PPCSubtarget
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| H A D | PPCSubtarget.h | 452 const RegisterBankInfo *getRegBankInfo() const override;
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.h | 409 const RegisterBankInfo *getRegBankInfo() const override;
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| H A D | MipsSubtarget.cpp | 294 const RegisterBankInfo *MipsSubtarget::getRegBankInfo() const { in getRegBankInfo() function in MipsSubtarget
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| H A D | MipsLegalizerInfo.cpp | 474 *ST.getRegBankInfo())) in SelectMSA3OpIntrinsic()
509 const RegisterBankInfo &RBI = *ST.getRegBankInfo(); in legalizeIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.h | 179 const RegisterBankInfo *getRegBankInfo() const override;
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| H A D | AArch64Subtarget.cpp | 308 const RegisterBankInfo *AArch64Subtarget::getRegBankInfo() const { in getRegBankInfo() function in AArch64Subtarget
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.cpp | 357 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const { in getRegBankInfo() function in X86Subtarget
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| H A D | X86Subtarget.h | 162 const RegisterBankInfo *getRegBankInfo() const override;
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| H A D | X86CallLowering.cpp | 359 *MF.getSubtarget().getRegBankInfo(), *MIB, MIB->getDesc(), Info.Callee, in lowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.h | 283 const RegisterBankInfo *getRegBankInfo() const override;
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| H A D | ARMSubtarget.cpp | 136 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo() function in ARMSubtarget
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 208 *STI.getRegBankInfo(), *MIB, MIB->getDesc(), in lowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 49 RBI(*Subtarget.getRegBankInfo()), TRI(*Subtarget.getRegisterInfo()), in AMDGPURegBankCombinerHelper()
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| H A D | GCNSubtarget.h | 245 const RegisterBankInfo *getRegBankInfo() const override { in getRegBankInfo() function
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